PROFIBUS Interface Center
The other interrupt controller registers are assigned in the bit positions, like the IRR.
Address Register
02H /
Interrupt Register
03H
(IR)
04H /
Interrupt Mask
05H
Register
(IMR)
02H /
Interrupt
03H
Acknowledge
Register
(IAR)
Figure 5.5: Additional Interrupt Registers
The 'New_Prm_Data', 'New_Cfg_Data' inputs may not be deleted via the Interrupt Acknowledge Register.
The relevant state machines delete these inputs through the user acknowledgements (for example,
'User_Prm_Data_Okay' etc.).
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Reset State
Readable
All bits deleted
only
Writable, can
All bits set
be changed
during
operation
Writable, can
All bits deleted
be changed
during
operation
V1.3
SPC3
Assignment
Bit =
Mask is set and the interrupt
1
is disabled.
Mask is deleted and the
Bit =
interrupt is enabled.
0
Bit =
The IRR bit is deleted.
1
The IRR bit remains
Bit =
unchanged.
0
SPC3 Hardware Description
Copyright (C) Siemens AG 2003. All rights reserved.