Chipset - NCR RealPOS XR6 User Manual

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4-96

Chipset

► PCH-IO Configuration
. ► PCI Express Configuration
. PCI Express Clock Gating
. DMI Link ASPM Control
. DMI Link Extended Synch Control
. PCIE Root Port Function Swapping
. Subtractive Decode
. ► PCI Express Root Port 1,2,4,5,6,7,8
. PCI Express Root Port 1,2,4,5,6,7,8
. ASPM Support
. . URR
. . FER
. . NFER
. . CER
. . CTO
. . SEFE
. . SENFE
. . SECE
. . PME SCI
. . Hot Plug
. PCIe Speed
. Detect Non-Compliance Device
. Extra Bus Reserved
. Resreved Memory
. Reserved I/O
. PCIE LTR
. PCIE LTR Lock
. Snoop Latency Override
. Non Snoop Latency Override
[Enabled]
[Enabled]
[Disabled]
[Enabled]
[Disabled]
[Enabled]
[Auto]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Disabled]
[Enabled]
[Disabled]
[Auto]
[Disabled]
0
10
4
[Enabled]
[Enabled]
[Auto]
[Auto]
BIOS Setup

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