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MODEL 615 ELECTROMETER
CIRCUIT
DESCRIPTION
TABLE 20.
I
comnan*
I
Function
I
I
324
ZERO
0:1
I
INTEGRATE
COUNT I
5.
When the "3,4"
comnlan* is given,
the integra-
tor
is charged
by the analog
signal
for a period
"f
1 line
cycle
or 16.67 milliseconds.
6.
When the "O,l"
command is given,
the analog
signal
is remove* an* the integrator
output
is
driven
co zero by e reference
current.
The Zero
Crossing
Detector
senses a zero crossing
of the In-
eegreeor
output
an* remOweS the refeeence
current.
The
detector
provides
outputs
as shown in Table
19.
The +1.5 vole
levels
are provided
for control
of the
Integrator
an* Polarity
storage
Register.
A pu1ae
command is also
produced
to initiate
a Buffer/Store
and print
Command output.
7.
When the Buffer/Store
command is given,
the
Suffer/Storage
Register
copies
the SCD Counterstatea
et that
instant
of time.
The SCD coded information
in the Register
is then available
for
the Decoder/
Driver
an* external
printout.
8.
The Decoder/Driver
decodee
the Buffer/Storage
output
and drives
the numerical
Readout
for
a digit-
al display.
9.
The BCD output
information
is available
at the
Model 4401 Buffer
Card "utput~
in the form of posi-
cive
(+lO volt)
true
logic
(1-2-4-S
BCD Code).
10.
The conversion
cycle
is completed
when the SCD
Counter
reaches
2000 counts
and the Program/Decoder
provides
a "2" commend to initiate
a new conversion
cycle.
11.
The Unijunction
Timing
Circuit
will
initiate
the ZERO period
after
a preset
time delay
controlled
by the front
panel
DISPLAY RATE Control.
3-S.
AN.4Loc-TO-DIGrt*L
CONVERTER CIRCD~TRY.
a.
General.
The circuits
described
in this
eecti""
at-e located
on the various
Sub-Assemblies
listed
below
end in Table
22 of Section
4.
1.
Oscillator
Board,
PC-217.
2.
Integrator
Board,
PC-246.
3.
Display/overload
Board,
PC-241
4.
Readout Board,
X-229
5.
Polarity
Board,
PC-207
6.
output
Buffer
Board,
PC-2L8
7.
output
Buffer
Board,
PC-209
b.
Oscillator
Board.
The Oscillaeor
Board codtains
portions
of three
circuits:
the Oscillator
(clock)
circuit,
the Delay/Hold
circuit,
and the Discharge-
Voltage
current
source
CirCUlt.
1.
Oscillator
Cic'cuit.
Trensi~tor
Q501, crystal
~501, and phase shift
capacitors
C501, and C502 form
a "colpitts"
type oscillator.
Capacitors
~503 and
~504 are used for
trimming
the oscillator
frequency.
The ""Cput
is taken
from the collector
of transistor
Q510 which
is a comnon emitter
gain
stage
used for
squaring
ee
""tpllt.
Transistor
Q507 serves
as an
emitter-follower
to reduce output
impedance.
2.
Delay/Hold
Circuit.
There ace three
major
components
in the Delay/Hold
circuit:
en "RS" type
flip-flop
circuit,
a 'Wnijunction"
timing
circuit
an* a "ROld"
gate circuit.
=)
"RS" Type Flip-Flop
Circuit.
The flip-flop
gates
the output
of the clock
depending
on the
inputs
at pins R and S.
The RS flip-flop
is coo-
strucced
of gates
QA5OlB and QA5OlC.
The pins
are identified
as shown in Figure
16.
b)
"Unijunction"
Timing
Circuit.
The unijunc-
tion
timing
circuit
determines
the time delay
be-
tween
conversion
cycles
to obtain
the
desired
coo-
version
rate
88 determined
by the front
panel
DIS-
PLAY RATE Control.
The circuit
is composed of
tran9isCors
Q513 and Q514, timing
capacitor
C507,
and timing
resistors
~532 end R1269 (DISPLAY RATE
Caner01 potentiometer
located
on the front
panel).
c)
"HOLD" Gate Circuit.
(Refer
to Figure
16
for
identification
of switches
S1 and S2).
The
"HOLD" gate circuit
is composed of gates
QASOlA.
QA501D, and QA502 (A, 8, C, and D).
Switch
S1 is
gate QA501A and is controlled
by either
the "HOLD
2" exrernal
line
or the "MAX" position
on the
DISPLAY RATE Control.
Switch
S2 is transistor
Q513 which is controlled
by either
ebe "Q" output
of the flip-flop
or the "HOLD 2" external
line.
The "HOLD I" circuit
is composed of gates
QASOZS
and QA502C.
3.
Discharge-Voltage
Current
Source Circuit.
The positive
current
source
composed of tran~ierors
Q502 and Q506 delivers
a constant
current
of +7.5
milliamperes
tb drive
a g-volt
zener diode D602
(located
on the Integrator
Board,
PC-246) when +REF
Terminal
(Pin
13) is greater
than co.7 volt.
The
negative
current
~""rce
composed of erensistors
Q508
and Q509 delivers
a constant
current
of -7.5
milli-
amperes to drive
a 9-volt
zener diode
0601 (also
located
on the Integrator
Board,
~-246).
c.
Integrator
Board.
The Integrator
Board consists
"f
two ma,or
circuits:
the Integrator
circuit
and the
Zero Crossing
Detector
circuit.
1.
Integrator
Circuit.
(Refer
to Figure
17 for
identification
of switches
Sa, Sb, S,,
and Sd).
The
operation
of the Integrator
is controlled
by ehe
poSitionS
of switches
So, Sb, S,, and Sd.
switch
S, is transistor
Q605.
Switch
Sb is transistor
Q606.
Transistors
Q601 through
Q604 are control
circuits
arranged
e" turn
off
the proper
FET Switchee
depending
on the signals
at pins
11 and 12.
The in-
tegrator
smplifier
conslets
of transistors
Q607 and
~608 and ineegraced
circuit
QA601.
The feedback
ca-
pacitor
is C603.
Switches
SC and Sd (located
on the
Oscillator
Board,
PC-217) control
the current
for
')-volt
zener diodes
0601 an* 0602.
~e~iseors
~602
26
0470
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