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FIGURE
17.
rntegrator
Block
Diagram
h.
zeru
crossing
Detector.
me
zero
crossing
De-
tector
circuit
provides
a "High"
or "Low"
level
output
depending
on the polarity
of the detected
input.
me-
Eer to Table
19 for a description
of voitage
outputs
of
Lhe Zero
Crossing
detector
(refer
co figure
18).
TABLE 19.
Zero Crossing
Detector
Outpur
Levels.
I
M
N
B
c
0"
-0.5"
i1.5"
ov
I
0"
13.5"
0"
~1.5" I
i.
Buffer/Storage
register.
The ~ufferl~torage
Register
is composed of "flip-flops"
arranged
to copy
the states
of the various
BCD counters.
The BUf fer/
Storage
Register
requires
a Buffer
Store
command be-
fore
any information
can be transferred.
The "flip-
flop"
circuits
provide
coded information
for Decoder/
Driver
and the BCD outputs.
~j.
Decoder/Dri.ver.
The Decoder/Driver
circuit
de-
0470
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