Advertisement
XODEL 615 ELECTROMETER
CIRCUIT DESCRIPTION
SECTION
3.
CIRCUIT
DESCRIPTION
3-l.
GENE&U..
a.
The Keithley
Model 615 Digital
Electrometer
con-
SiSe.3 of t&m separate
sections
(except
for
the power
supplies)
packaged
rogeeber
in one chassis
for optimum
performance
and convenience:
an Electrometer
and an
analog-to-digital
converter.
b.
The Electrometer
is basically
an extremely
sta-
ble and linear
DC voltmeter
with
a full-scale
sensi-
tir;'y
of 100 millivolts
and an input
impedance
of
10
ohms shunted
by 35 picafarads.
sy using
the
frone
panel
controls,
shunr
resiseors
and capacitors
are selected
to make measurements
over a total
of 120
voltage,
current,
resistance,
and coulomb rariges.
Current
and resistance
are measured using
precision
resistance
standards,
from 10 ohm wirewound
resistors
to 1011 ohm glass-sealed,
deposited
carbon
resistors.
Coulombs are measured
using
close
tolerance
polysty-
rene film
capacitor
standards.
c.
the analog-to-digital
converter
is a dual
slope
integrating
type converter
with
medium conversion
rate,
cold
cathode
readout
tubes,
BCD outpue
options
and external
control.
3-2.
ELECTF.omTER A!4PLIFIER OeEP.ATION.
a.
The Model 615 electrometer
amplifier
employs
matched
insulated-gate
field-effect
transistor8
fol-
lowed by a transis;or
differential
amplifier
with
a
high-voltage
complementary
output
stage.
Refer
to
Figure
10 which
shows a block
diagram
of the Electrom-
eter.
b.
The Electrometer
amplifier
is connected
as a
unity-gain,
voltage-to-current
converter
configura-
tion.
Refer
to Figure
11 for a simplified
diagram
of
the unity-gain
amplifier
in the Normal Mode.
The
sensitivity
selection
circuitry
is arranged
such that
a full-scale
input
voltage
(ei)
results
in a 1 rnilli-
ampere output
current
through
the Sensitivity
resis-
tor
represented
by Rs.
The unity-gain
voltage
output
(es)
is determined
as follows:
e, = ei .&
where
K is
the
amplifier
loop
gain.
3-3.
AMPLIFIER CIRCUIT
a.
The amplifier
input
stage
is a pair
of insulated-
gate
field-effect
rzr~nsistors
(IGFET)
designated
01201
and ~1202 connected
in B differential
configuration.
The "gate"
terminal
of transistor
Q1202 is connected
eo the unity-gain
output.
b.
The input
stage
is followed
by a Cransistor
dif-
ferential
amplifier
composed of transistors
Q1203 and
Q1204.
Transistors
01207 and 01212 make UP a bizh
&in
stage
which
pre;ents
"fold-we+
and ;'lock-;p"
with
positive
input
overloads.
Diode D1214 between
0472R
19
Advertisement
