Front Control Panel Pin Defi Nitions; Nmi Button; Power Led - Supermicro X10DRG-O+-CPU User Manual

X10DRG-O(T)+-CPU/X10DRG-O-PCIE User's Manual
Front Control Panel Pin Defi nitions

NMI Button

The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin defi nitions.

Power LED

The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin defi nitions.
JPW22
JPW21
USB2/3
CLOSE 1st
JPB1
J1
CPU2
JPME2
JBR1
JWD1
OPEN 1st
JSPK1
JF1
1
JF1
PWR RST PS UID NIC NIC HDD PWR NMI
ON FAIL LED 2 1 LED LED
IPMI_LAN
USB5/6(3.0)
VGA
LAN2 LAN1
BMC
LAN
CTRL
JPW23
PCH
JBT1
BT1
1
X10DRG-O+-CPU
REV: 1.00
BAR CODE
1G/10G MAC CODE
BIOS LICENSE
IPMI CODE
10G SAN MAC
CLOSE 1st
CPU1
OPEN 1st
JPP2
JITP1
JPP1
2-22
NMI Button
Pin Defi nitions (JF1)
Pin# Defi nition
19 Control
20 Ground
Power LED
Pin Defi nitions (JF1)
Pin# Defi nition
15 3.3V
16 PWR LED
1 2
Ground
PWR Power Button
Ground
Reset Button
Reset
Power Fail LED
OH/Fan Fail LED
UID LED
NIC2 Link LED
NIC1 Link LED
HDD LED
2
PWR LED
X
1
NMI Ground
19 20
JPW24
JPW5
1. NMI
I-SGPIO2
I-SGPIO1
2. PWR LED
LD1
LD2
3.3V
NIC2 Activity LED
NIC1 Activity LED
ID_UID_SW/3/3V Stby
3.3V
X