Architecture; Interfaces; Figure 1. Architecture Overview - Sierra Wireless AirPrime HL77 Series Product Technical Specification

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Product Technical Specification
1.4.

Architecture

The figure below presents an overview of the AirPrime HL77xx modules' internal architecture and
external interfaces.
Note:
Dotted parts are optional depending on variant.
LGA-
146
Figure 1.
Architecture Overview
1.5.

Interfaces

The AirPrime HL77xx modules provide the following interfaces and peripheral connectivity:
1x - VGPIO (1.8V)
1x - 1.8V USIM
1x - eUICC/USIM (optional embedded SIM)
1x - USB 2.0
10x - GPIOs (1 of which has a multiplex)
1x - 8-wire UART
1x - Active Low POWER ON
1x - Active Low RESET
2x - ADC
2x - System Clock Out (32,768KHz and 26MHz)
1x – Debug Interface
41110555
VGPIO
Analog Baseband
RESET_IN_N
PWR_ON
USB
SIM
Switch
Embedded
SIM
Rev 1.0
AirPrime HL7718, HL7748 and HL7749
26MHz
Transceiver
Baseband
MCU
DSP
PMU
Peripherals
RAM Memory
32.768KHz
SAW
RX
Front-End
Filters
Module
(SAW/PA/
Switch)
Flash
Memory
November 01, 2017
Introduction
VBATT_PA
LGA-
146
13

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