Emergency Stop Operation - LAPIS Semiconductor ML610Q174 User Manual

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10.3.8 Emergency Stop Operation

Setting the P4SDE1 and P4SDE0 bits of the PWM4 control register 3 (PW4CON3) enables the emergency stop
function with the external input (P00/PW45EV0 or P30/PW45EV1 pin) that is selected by P4TGSEL. Note that
the emergency stop function is valid only in the cooperation mode (P45MD="1").
When the external input that is selected by the P4TGSEL bit gets an edge input specified by P4SDE1 an
P4SDE0, the emergency stop flag (P4SDST) is set to "1", an emergency stop interrupt (PW4INT) is generated,
and the PWM counter is stopped/cleared. Because the PWM flag output (PnFLG) is cleared, the PWM4 and
PWM5 outputs are turned off simultaneously.
To release the emergency stop flag, write "1" to P4SDST of the PWM4 control register 3 (PW4CON3).
Figure 10-11 shows the operation timing.
P00/P45EV0
or
P30/P45EV1
PnRUN
P4SDST
PW4INT
PnFLG
PWnCH/L
Emergency stop by P4SDE1=1, P4SDE0=0 (Rising edge)
P00/P45EV0
or
P30/P45EV1
PnRUN
P4SDST
EMGINT
PnFLG
PWnCH/L
0000
FEUL610Q174-01
Emergency stop by P4SDE1=0, P4SDE0=1 (Falling edge)
0000
Count up
0000
(a) Timing with Falling-edge operation
Count up
0000
Count up
(b) Timing with Rising-edge operation
Count stop & clear
Count up
0000
Emergency
Release emergency
stop
stop flag
Count stop & clear
0000
Count up
Emergency
The PnINI bit allows selection of the "H/L" level for
Release emergency
stop
the PWM initial value.
stop flag
ML610Q174 User's Manual
Chapter 10
Count up
0000
Count up
The PnINI bit allows selection of the "H/L" level
for the PWM initial value.
0000
Count up
PWM
10-58

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