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Viewing NVMe Transactions
Previous help topics described how you can configure and compute transactions in the Transaction
Decode tab. This topic is specific to NVMe transactions and provides examples of how you can
interpret NVMe transactions that are computed and displayed in the Transaction Decode tab.
The decoded NVMe transactions provide you a sequential view of the communication cycle between
the host software and NVMe controller for various requests placed by the host software in queues.
You can check how the NVMe controller responds to and completes these requests. At the
administrative management level, you can verify how the NVMe controller handles admin requests
such as queue management requests.
For NVMe, the Transaction Decode tab displays transactions for:
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Viewing Transactions for NVMe Controller Initialization
The following screen displays a set of transactions for NVMe controller initialization. The AQA, ASQ,
and ACQ registers are modified to define the Admin Submission Queue and its corresponding Admin
Completion Queue. The transactions display the Admin queue attributes in terms of size (128 entries)
and the base address (64-bit physical address) to be used for Admin submission queue and
completion queue.
Keysight U4301 PCIe Gen3 Analyzer User's Guide
NVMe controller initialization such as Admin queue configuration
NVMe Admin and I/O commands submission and their responses (completions).
MSI-X interrupts initiations by controller
NVMe I/O submission and completion queues management
Computing and Viewing Decoded Transactions
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