2.8 External Interrupts
Two on-board push-button switches are provided for external interrupt generation, as shown in
Figure
2-7. S2 allows the user to generate a hardware interrupt for signal line IRQA. S3 allows
the user to generate a hardware interrupt for signal line IRQB. These two switches allow the user
to generate interrupts for his user-specific programs.
Figure 2-7. Schematic Diagram of the User Interrupt Interface
2.9 Reset
Logic is provided on the 56F8357 to generate an internal Power-On RESET. Additional reset
logic is provided to support the RESET signals from the JTAG connector, the Parallel JTAG
Interface and the user RESET push-button, S1; refer to
Figure 2-8. Schematic Diagram of the RESET Interface
2-14
+3.3V
10K
S2
0.1µF
+3.3V
S3
0.1µF
JTAG_RESET
RESET
PUSHBUTTON
MANUAL RESET
S1
JTAG_TAP_RESET
56F8357EVM User Manual, Rev. 1
56F8357
IRQA
10K
IRQB
Figure
2-8.
RESET
TRST
Freescale Semiconductor
Preliminary