Ttl_Lcd Clock Selection (Jp6); Vga Display Connector (Cn1); Ide Connector (Cn2) - Aaeon PFM-530I Manual

Embedded stpc, atlas 133mhz processor, with svga/lcd interface, pc/104 cpu module
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P C / 1 0 4 M o d u l e
2.11 TTL-LCD Clock Selection (JP6)
JP6
Function
1-2
Reverse CLK
* Default

2.12 VGA Display Connector (CN1)

Pin
Signal
1
RED
3
GREEN
5
BLUE
7
N.C
9
GND
11
GND
13
GND
15
GND

2.13 IDE Connector (CN2)

Pin
Signal
1
IDE RESET
3
DATA7
5
DATA6
7
DATA5
9
DATA4
11
DATA3
P F M - 5 3 0 I
JP6
Function
2-3*
CLK
Pin
Signal
2
+5V
4
GND
6
N.C
8
DDCDAT
10
HSYNC
12
VSYNC
14
DDCCLK
16
GND
Pin
Signal
2
GND
4
DATA8
6
DATA9
8
DATA10
10
DATA11
12
DATA12
Chapter 2 Quick Installation Guide
2-11

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