Read Around Write - MSI MS-5156 Manual

Pci pentium tx4 m/b
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USWC Write Posting
Set this option to Enabled to use USWC(Uncacheable,
Speculatable, Write-Combined) memory. The settings are Enabled or
Disabled. The Optimal and Fail-Safe default settings are Disable.
CPU To PCI Posting
Set this option to Enabled to give priority to posted messages from
the CPU to the PCI bus. The settings are Enabled or Disabled. The Optimal
and Fail-Safe default settings are Enabled.
PCI to DRAM Pipeline
Set this option to Enabled the pipeline from the PCI bus to system
memory. The settings are Enabled or Disabled. The Optimal and Fail-Safe
Default settings are Enabled.
PCI Burst Write Combine
Set this option to Enabled to allow write instructions to be
combined in PCI Burst mode. The settings are Enabled or Disabled. The
Optimal and Fail-Safe default settings are Enabled.

Read Around Write

Set this option to Enabled to allow read operations to bypass write
operations in the memory controller. The settings are Enabled or Disabled.
The Optimal and Fail-Safe default settings are Enabled.
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