SanDisk CompactFlash Extreme III Product Manual page 49

SanDisk CompactFlash Card OEM Product Manual
Table 4-6
Data Register
Error/Feature Register
Error/Feature Register
4.5.2 Error Register (Address–1F1[171]; Offset 1, 0Dh Read Only)
This register contains additional information about the source of an error when an error is
indicated in bit 0 of the Status Register. The bits are defined as follows:
D7
BBK
This register is also accessed on data bits D15-D8 during a write operation to offset 0 with ­
CE2 low and -CE1 high.
Bit
D7
D6
D5
D4
D3
D2
D1
D0
4.5.3 Feature Register (Address–1F1[171]; Offset 1, 0Dh Write Only)
This register provides information about CompactFlash Memory Card features the host can
utilize. This register is also accessed on data bits D15-D8 during a write operation to Offset 0
with CE2 low and -CE1 high.
4.5.4 Sector Count Register (Address–1F2[172]; Offset 2)
This register contains the number of sectors of data requested to be transferred on a read or
write operation between the host and the card. If the value in this register is zero, a count of
256 sectors is specified. If the command was successful, this register is "0" at command
completion. If not successfully completed, the register contains the number of sectors that
need to be transferred in order to complete the request.
4.5.5 Sector Number (LBA 7-0) Register (Address–1F3[173]; Offset 3)
This register contains the starting sector number or bits 7-0 of the Logical Block Address
(LBA) for any CompactFlash Memory Card data access for the subsequent command.
© 2007 SanDisk Corporation
Data Register
CE2- CE1-
0 1
0 0
D6 D5 D4
UNC 0 IDNF
Name
BBK Set when a bad block is detected.
UNC Set when an uncorrectable error is encountered.
0 Bit set to 0.
IDNF The requested sector ID is in error or cannot be found.
0 Bit set to 0.
ABRT Set if the command has been aborted because of a card status condition:
(Not Ready, Write Fault, etc.) or when an invalid command has been
issued.
0 Bit set to 0.
AMNF Set in case of a general error.
4-5
ATA Register Set and Protocol
A0 Offset
X 1
X Dh
D3 D2 D1
0 ABRT 0
Description
Data Bus
D15-D0
D15-D0
D0
AMNF
Rev. 12.0, 02/07