True Ide Mode Addressing; Ata Registers - SanDisk CompactFlash Extreme III Product Manual

Sandisk compactflash memory card product manual
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ATA Register Set and Protocol
4.4

True IDE Mode Addressing

When a CompactFlash Memory Card is configured in the True IDE Mode the I/O decoding is
as listed in Table 4-5.
Table 4-5
-CE2
1
1
1
1
1
1
1
1
0
0
4.5

ATA Registers

In accordance with the PCMCIA specification: each of the registers below which is located at
an odd offset address may be accessed at its normal address and also the corresponding even
address (normal address -1) using data bus lines (D15-D8) when -CE1 is high and -CE2 is low
unless -IOIS16 is high (not asserted) and an I/O cycle is being performed.
4.5.1
Data Register (Address–1F0[170]; Offset 0, 8, 9)
The Data Register is a 16-bit register, and it is used to transfer data blocks between the
CompactFlash Memory Card data buffer and the host. This register overlaps the Error
Register. The information in Table 3-6 describes the combinations of data register access and
is provided to assist in understanding the overlapped Data Register and Error/Feature Register
rather than attempt to define general PCMCIA word and byte access modes and operations.
Refer to the PCMCIA PC Card Standard Release 2.0 for definitions of the Card Accessing
modes for I/O and memory cycles.
: Because of the overlapped registers, access to the 1F1, 171 or offset 1
NOTE
are not defined for word (-CE2 = 0 and -CE1 = 0) operations.
SanDisk products treat these accesses as accesses to the Word Data
Register. The duplicated registers at offsets 8, 9 and Dh have no
restrictions on the operations that can be performed by the socket.
Table 4-6
Data Register
Word Data Register
Even Data Register
Odd Data Register
Odd Data Register
Error/Feature Register
02/07, Rev. 12.0
True IDE Mode I/O Decoding
-CE1
A2
A1
A0
0
0
0
0
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
1
1
0
1
1
1
1
Data Register
CE2-
CE1-
0
0
1
0
1
0
0
1
1
0
4-4
SanDisk CompactFlash Card OEM Product Manual
-IORD=0
Even RD Data
Even WR Data
Error Register
Features
Sector Count
Sector Count
Sector No.
Sector No.
Cylinder Low
Cylinder Low
Cylinder High
Cylinder High
Select Card/Head
Select Card/Head
Status
Command
Alt Status
Device Control
Drive Address
Reserved
A0
Offset
X
0,8,9
0
0,8
1
9
X
8,9
1
1,Dh
© 2007 SanDisk Corporation
-IOWR=0
Data Bus
D15-D0
D7-D0
D7-D0
D15-D0
D7-D0

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