Supermicro X11DPFF-SN User Manual page 79

Hide thumbs Also See for X11DPFF-SN:
Table of Contents

Advertisement

MCP0 (IIO PCIe Br4)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x16 and Auto.
MCP1 (IIO PCIe Br5)
This feature confi gures the PCI-E Bifuraction setting for a PCI-E port specifi ed by the user.
The options are x16 and Auto.
CPU1 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1
Confi guration only)
Link Speed
This feature confi gures the link speed of a PCI-E port specifi ed by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)
The following information will also be displayed:
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Confi guration only)
Select Auto for the BIOS to automatically set the maximum payload value for a PCI-E
device specifi ed by to user to enhance system performance. The options are Auto, 128B,
and 256B.
IOAT Confi guration
Disable TPH (TLP Processing Hint)
TPH is used for data-tagging with a destination ID among other important attributes. It can
send critical data to a particular cache without writing through to memory. Select No in this
item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"
to help optimize the processing of each transaction occurred in the target memory space.
The options are Yes and No.
Prioritize TPH (TLP Processing Hint) (Not Available when the item: Disable TPH is
set to Yes)
Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate
and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.
79
Chapter 4: BIOS

Advertisement

Table of Contents
loading

Table of Contents