Renesas M65881AFP Specification Sheet page 7

Digital amplifier processor of s-master technology
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M65881AFP
EXPLANATION OF OPERATION
1. DATA,BCK,LRCK
DATA,BCK, and LRCK are input pins for Digital Audio Signal of CD, MD, DVD etc..
Input formats are supported by 4 ways, and are set by Serial Control, "System1 Mode, bit3 and bit4".
Input data length are selectable in a case of "MSB First Right Justified"
(Serial Control "System1 Mode,bit5 and bit6").
•Input formats are shown in following figures.
MSB first left justified
(24bit)
MSB first right justified
(16bit, 20bit, 24bit)
LSB first right justified
(24bit)
I
S(24bit)
2
page 7 of 23
Rev.1.00 2003.05.08
LRCK
BCK
MSB
DATA
(24bit)
LRCK
BCK
DATA
(16bit)
MSB
DATA
(20bit)
MSB
DATA
(24bit)
LRCK
BCK
LSB
DATA
(24bit)
LRCK
BCK
1 BCK
MSB
DATA
(24bit)
1/fsi, 1/2fsi, 1/4fsi
Left
LSB
24cycle
1/fsi, 1/2fsi, 1/4fsi
Left
LSB
MSB
16 cycle
LSB
20 cycle
LSB
24 cycle
1/fsi, 1/2fsi, 1/4fsi
Left
MSB
24 cycle
1/fsi, 1/2fsi, 1/4fsi
Left
LSB
24 cycle
Right
MSB
24cycle
Right
MSB
MSB
MSB
Right
LSB
Right
1 BCK
MSB
24 cycle
LSB
LSB
16 cycle
LSB
20 cycle
LSB
24 cycle
MSB
24 cycle
LSB

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