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M65881AFP
PIN CONFIGURATION
VddL
OUTL1
VssL
3.3V
OUTL2
system
XOVdd
XfsoOUT
XOVss
DVdd
1.8V
system
DVss
MCKSEL
SCDT
SCSHIFT
SCLATCH
NSPMUTE
3.3V
system
INIT
LRCK
BCK
DATA
BFVdd
BFVss
XfsiIN
page 2 of 23
Rev.1.00 2003.05.08
1
2
PWM output
for Power Stage
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
PWM output
for Headphone
42
VddR
41
OUTR1
40
VssR
39
OUTR2
38
VssLR
37
XVdd
36
XfsoIN
35
XVss
34
HPVddL
33
HPOUTL1
32
HPVssL
31
HPOUTL2
30
HPVddR
29
HPOUTR1
28
HPVssR
27
HPOUTR2
26
TEST1
25
TEST2
24
SFLAG
23
FsoI
22
FsoCKO
3.3V
system
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