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4.6
Clock Configuration
The DAC8742H device supports a variety of clocking options in order to provide system flexibility and
reduce overall current consumption in HART applications. The clocking options include: an internal
oscillator (HART mode only), an external crystal oscillator, or an external CMOS clock.
Configure clock selection via the XEN, CLK_CFG1, and CLK_CFG0 pins (see
XEN
CLK_CFG1
1
0
1
0
1
1
1
1
0
0
0
0
0
1
0
1
1
0
1
1
0
0
0
1
The XTAL1 and XTAL2 pins of the DAC8742H device are also configurable through the JP1, JP2, and J1
jumpers (see
Table
SLAU700A – June 2017 – Revised November 2017
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Table 9. Clock Configuration
CLK_CFG0
CLKO
0
No output
1
No output
0
No output
1
1.2288-MHz output
0
No output
1
3.6864-MHz output
0
1.8432-MHz output
1
1.2288-MHz output
0.5 × IOVDD
No output
0.5 × IOVDD
No output
0.5 × IOVDD
No output
0.5 × IOVDD
4-MHz output
10).
Table 10. XTAL1 and XTAL2 Configuration Settings
Jumper
Description
(1 – 2) 3.686-MHz crystal
JP1
(2 – 3) 4-MHz crystal
(1 – 2) 3686-MHz crystal
JP2
(2 – 3) 4-MHz crystal
J1
Optional CMOS clock connection
Copyright © 2017, Texas Instruments Incorporated
DAC8742HEVM Hardware Overview
Description
3.6864-MHz CMOS clock connected at XTAL1
1.2288-MHz CMOS clock connected at XTAL1
Internal oscillator enabled
Internal oscillator enabled, CLKO enabled
Crystal oscillator enabled
3.6864-MHz crystal oscillator, CLKO enabled
1.8432-MHz crystal oscillator, CLKO enabled
1.2288-MHz crystal oscillator, CLKO enabled
4-MHz CMOS clock connected at XTAL1
2-MHz CMOS clock connected at XTAL1
4-MHz crystal oscillator
4-MHz crystal oscillator, CLKO enabled
Table
9).
Mode
HART
FOUNDATION
Fieldbus and
PROFIBUS PA
DAC8742H Evaluation Module
9
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