Radio Shack TRS-80 Service Manual page 39

5-Meg Hard Disk
Service Manual
bit so that
CLOCKS will
be on the RCLK* phase and DATA will
be on the
RCLK phase. The processor makes
its
assessment
of
the state
of
the data stream solely on the
occurrence
of a
significant run of zeros which
is
detected by the
one-shot
(Ul)
in
the DRUN circuit* Once released, the phase of RCLK
vs.
data and clocks will remain stable throughout the read
of an ID
field or
data
fieldo
Whenever SRCH
is
dropped, the
VCO to
RCLK divider
is
once again reset and no
RCLKS are
produced
.
Data Conversion and Checking
MFM data which has been separated to
form NRZ data and
clocks
is
processed through specialized circuitry
to
prepare
it
for
parallel processing by the 8X300. This
processing
consists
of
three functional circuitSo
1.
AM detection
(Ull)
2.
Serial-to-Parallel conversion
(U9)
3o
CRC checking circuit
(U6)
Each function will be discussed separately but bear
in
mind
that
many interdependencies
exist.
AM Detection
As
previously stated,
it is
impossible
to
know whether
serial data bits are actually data or clock bits by just
looking at the
data stream. Furthermore,
it is
equally
impossible
to
determine byte boundaries. The problem
is
solved by
a
uniquely recorded data/clock pattern called
an
Address Mark
(AM)
.
The AM consists of
a
data pattern
of
HEX
'Al
?
with
a
missing clock pattern
of
HEX
0A'.
Normally
a
data byte
of of
HEX
'
Al
'
requires
a
clocking pattern of
HEX
'OE
1
.
In fact,
due
to the
rules of
MFM data encoding,
an
alternating clock pattern such
as
HEX
'A 8
or
HEX
8
5'
cannot
exist legally.
The
AM
is
used
to
uniquely identify the start of
a
field of
information (data or ID field)
within each
sector. A long
run of zero
data always precedes each AM on the
disk. Zeros
have
a
clock bit
for
every
RCLK.
When attempting
to
read
information from the
disk, the
Controller first acquires
phase lock over
a
field
of zeros.
When this acquisition
is
achieved, the processor releases the AM detector
(Ull)
by
raising the Search control line
(SRCH)
on the MAC
CNTRL port
(U29)
.
37