Cpu Configuration; E.5.4 Cpu Configuration; Chipset Configuration Sub-Menu - Psion Teklogix Vehicle-Mount Computer 8590 User Manual

Appendix E: BIOS

CPU Configuration

E.5.4 CPU Configuration

Feature
Processor Info
Block
On Demand Clock
Modulation
E.5.5 Chipset Configuration Sub-Menu
Feature
Memory Hole
IOAPIC
APIC ACPI SCI
IRQ
C4 On C3
Active State
Power Manage-
ment
PCI Express Port 1
E-8 8580/8590 Vehicle-Mount Computer User Manual
Options
Displays the processor manufacturer, brand, fre-
No option
quency, and cache sizes.
Allows a reduction of the performance of the
processor by utilizing clock modulation. The
value indicates the CLOCK ON to CLOCK
Disable OFF interval ratio. E.g. 75% results in a perfor-
mance decrease of about 25%.
Note: This option is only available for Celeron
M CPUs.
Options
Enable or disable the memory hole between
Disabled
15MB and 16MB. If enabled, accesses to this
15MB-16MB
range are forwarded to the LPC/PCI bus.
Disabled
Enable/Disable ICH6M IOAPIC function.
Enabled
Disabled If set to disabled, IRQ9 is used for the SCI.
Enabled If set to enabled, IRQ20 is used for the SCI.
If enabled, the CPU is put to C4 state, when the
Disabled
ACPI OS initiates a transition to C3, for addi-
Enabled
tional power saving at "Desktop Idle Mode".
Disabled Enable or disable PCI Express L0 and L1 link
Enabled power states.
Enabled
Disabled
Description
Description