Accessing The Interrupt Pii - Siemens SIMATIC S5-100U System Manual

Addressing
6.6 Interrupt Process Images and Time-Controlled Program Processing
in OB13 for CPU 103, Version 8MA02 and Higher
In the event of a time-controlled or process interrupt, the CPU does not access the I/O modules
directly. The CPU stores its information in interrupt process images.
• The interrupt process images are used only for time-controlled or interrupt-driven program
processing.
• The interrupt process images and the "normal" process images have identical structures.
• The interrupt process input image (interrupt PII) and interrupt process output image (interrupt
PIQ) take up an area of 128 bytes each in the RAM.
The interrupt PII and interrupt PIQ can be divided into three address areas as shown in Table 6-4.
Table 6-4. Structure of the Interrupt PII and the Interrupt PIQ
Byte address in interrupt
PII and interrupt PIQ
0 to 31
32 to 63
64 to 127
Note
The interrupt process images can be accessed by byte or word operations only.
6.6.1

Accessing the Interrupt PII

• The interrupt PII can only be accessed in connection with time-controlled or interrupt-driven
program processing.
• Data from inputs is read into the interrupt PII only at the beginning of time-controlled program
processing. This data is available only to the time-controlled program for evaluation.
6-12
Module
Digital modules
Unassigned address space
Analog modules
S5-100U
Slot number
0 to 31
0 to 7
EWA 4NEB 812 6120-02b