Siemens SIMATIC S5-100U System Manual page 187

Simatic s5 series cpu 100/102/103
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S5-100U
Resetting a Counter "R" and Counting Up "CU"
Example:
When input I 0.0 is switched on, the count in counter 1 is incremented by 1. As long as a second
input (I 0.1) is "1", the count is reset to "0".
The A C 1 operation results in signal state "1" at output Q 1.0 as long as the count is not "0".
Timing Diagram
1
0
1
0
2
0
1
0
R
STL
A
I
0.0
CU
C
1
NOP
0
NOP
0
NOP
0
A
I
0.1
R
C
1
NOP
0
NOP
0
A
C
1
=
Q
1.0
EWA 4NEB 812 6120-02b
I 0.0
I 0.1
C 1
Q 1.0
Time
C 1
CSF
C 1
I 0.0
CU
CD
S
CV
BI
DE
I 0.1
Q 1.0
R
Q
STEP 5 Operations
Circuit Diagram
I 0.1
R
S
CI
I 0.0
I I I I
CQ
0
Q 1.0
LAD
C 1
I 0.0
CU
CD
S
CV
BI
DE
I 0.1
R
Q
Binary
16 bits
Q 1.0
8-29

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