Siemens SIMATIC S5-100U System Manual page 264

Interrupt Processing
Triggering an Interrupt
Interrupts can only be triggered by four-channel digital input modules and comparator modules that
are plugged into slots 0 and 1 on a bus unit with interrupt capability.
Interrupts are triggered by a change in the signal state (0 1=positive edge; 1 0=negative edge)
at the respective interrupt input. Then the programmable controller automatically branches to OB2.
If you have not programmed OB2, either the cyclic or time-controlled program resumes immediately
after the interrupt.
The cyclically processed program can be interrupted after every STEP 5 statement.
The processing of integral FBs can be interrupted at certain points (see section 9.2). The data cycle
(see section 2.2.2) can be interrupted after each data packet consisting of four data bits and a check
bit.
INTERRUPT!
Figure 10-2. Program Interruptions by Process Interrupts
Use the IA command to disable interrupt processing. Use the RA command to enable interrupt
processing. The default setting is RA (see section 8.2.8).
Note
Even for interrupt processing, you may not exceed the general block nesting depth of 16
levels.
Interrupt Priorities
If a second interrupt is triggered during an interrupt processing, the second interrupts is processed
at the end of the first interrupt processing.
Note
If both a positive and negative pulse edge occur at an interrupt input while the IA
operation is valid (disable interrupt), it is no longer possible to determine the channel that
has triggered the interrupt.
But after an RA operation, OB2 is still called up.
10-2
Cyclic or time-controlled
program processing
. . .
A I 0.2
S Q 14.0
. . .
BE
Interrupt-driven
program processing
Interrupt PII
OB2
L PY2
.
.
.
BE
Interrupt PIQ
EWA 4NEB 812 6120-02b
S5-100U