Advantech ASMB-925T2-00A1 User Manual page 69


Execute Disable Bit
To "Enable or disable" the Execute Disable Bit feature. The Optimal and Fail-
Safe default setting is Enabled. If Disabled is selected, the BIOS forces the XD
feature flag to always return to 0.

VMX
Enable or disable Intel Virtual Machine Extensions (VMX) for IA-32 processors
that support Intel® Vanderpool Technology

Enable SMX
To "Enable or disable" the Safer Mode Extensions. Safer Mode Extensions
(SMX) provide a means for system software to launch an MLE and establish a
measured environment within the platform to support trust decisions by end
users.

Hardware Prefetcher
Hardware Prefetcher is a technique that fetches instructions and/or data from
memory into the CPU cache memory well before the CPU needs it, so that it can
improve the load-to-use latency.

Adjacent Cache Prefetch
The Adjacent Cache-Line Prefetch mechanism, like automatic hardware
prefetch, operates without programmer intervention. When enabled through the
BIOS, two 64-byte cache lines are fetched into a 128-byte sector, regardless of
whether the additional cache line has been requested or not.

DCU Streamer Prefetcher
Enable prefetch of next L1 data line based upon multiple loads in same cache
line.

DCU IP Prefetcher
Enable prefetch of next L1 line based upon sequential load history.

DCU Mode
Change the data cache unit mode.

AES-NI
This item is to enable or disable CPU advanced encryption standard instruc-
tions.
61 ASMB-925 User Manual