ABB REL650 Product Manual page 22

Line distance protection REL650 2.2
Product version: 2.2.1
according to the specific application needs for settable pulse
or steady output.
Group alarm logic function ALMCALH
The group alarm logic function (ALMCALH) is used to route
several alarm signals to a common indication, LED and/or
contact, in the IED.
Group warning logic function WRNCALH
The group warning logic function (WRNCALH) is used to route
several warning signals to a common indication, LED and/or
contact, in the IED.
Group indication logic function INDCALH
The group indication logic function (INDCALH) is used to
route several indication signals to a common indication, LED
and/or contact, in the IED.
Basic configurable logic blocks
The basic configurable logic blocks do not propagate the time
stamp and quality of signals (have no suffix QT at the end of
their function name). A number of logic blocks and timers are
always available as basic for the user to adapt the
configuration to the specific application needs. The list below
shows a summary of the function blocks and their features.
These logic blocks are also available as part of an extension
logic package with the same number of instances.
• AND function block. The AND function is used to form
general combinatory expressions with boolean variables.
The AND function block has up to four inputs and two
outputs. One of the outputs is inverted.
• GATE function block is used for whether or not a signal
should be able to pass from the input to the output.
• INVERTER function block that inverts the input signal to the
output.
• LLD function block. Loop delay used to delay the output
signal one execution cycle.
• OR function block. The OR function is used to form general
combinatory expressions with boolean variables. The OR
function block has up to six inputs and two outputs. One of
the outputs is inverted.
• PULSETIMER function block can be used, for example, for
pulse extensions or limiting of operation of outputs, settable
pulse time.
• RSMEMORY function block is a flip-flop that can reset or
set an output from two inputs respectively. Each block has
two outputs where one is inverted. The memory setting
controls if, after a power interruption, the flip-flop resets or
returns to the state it had before the power interruption.
RESET input has priority.
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GUID-16E60E27-F7A8-416D-8648-8174AAC49BB5 v4
GUID-F7D9A012-3AD4-4D86-BE97-DF2A99BE5383 v4
GUID-D8D1A4EE-A87F-46C6-8529-277FC1ADA9B0 v4
M11396-4 v16
• SRMEMORY function block is a flip-flop that can set or
reset an output from two inputs respectively. Each block
has two outputs where one is inverted. The memory setting
controls if, after a power interruption, the flip-flop resets or
returns to the state it had before the power interruption.
The SET input has priority.
• TIMERSET function has pick-up and drop-out delayed
outputs related to the input signal. The timer has a settable
time delay.
• XOR is used to generate combinatory expressions with
boolean variables. XOR has two inputs and two outputs.
One of the outputs is inverted. The output signal OUT is 1 if
the input signals are different and 0 if they are the same.
Fixed signal function block FXDSIGN
The Fixed signals function (FXDSIGN) has nine pre-set (fixed)
signals that can be used in the configuration of an IED, either
for forcing the unused inputs in other function blocks to a
certain level/value, or for creating certain logic. Boolean,
integer, floating point, string types of signals are available.
One FXDSIGN function block is included in all IEDs.
Elapsed time integrator with limit transgression and overflow
supervision TEIGAPC
The Elapsed time integrator function (TEIGAPC) is a function
that accumulates the elapsed time when a given binary signal
has been high.
The main features of TEIGAPC
• Applicable to long time integration (≤999 999.9
seconds).
• Supervision of limit transgression conditions and
overflow.
• Possibility to define a warning or alarm with the
resolution of 10 milliseconds.
• Retaining of the integration value.
• Possibilities for blocking and reset.
• Reporting of the integrated time.
Boolean to integer conversion, 16 bit B16I
Boolean to integer conversion, 16 bit (B16I) is used to
transform a set of 16 boolean (logical) signals into an integer.
Boolean to integer conversion with logical node
representation, 16 bit BTIGAPC
Boolean to integer conversion with logical node
representation, 16 bit (BTIGAPC) is used to transform a set of
16 boolean (logical) signals into an integer. The block input
will freeze the output at the last value.
Integer to Boolean 16 conversion IB16
Integer to boolean 16 conversion function (IB16) is used to
transform an integer into a set of 16 boolean (logical) signals.
1MRK 506 384-BEN A
M15322-3 v12
GUID-2D64874A-F266-4251-8EED-E813F40513D7 v3
SEMOD175725-4 v5
SEMOD175781-4 v8
SEMOD158373-5 v6
ABB