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I
NTRODUCTION TO THE
8 Example Program
As an illustration of ARM instructions and assembler directives, Figure 3 gives an assembly-language program that
computes a dot product of two vectors, A and B. The vectors have
The vectors are stored in memory locations at addresses AVECTOR and BVECTOR, respectively. The number of
elements,
n
, is stored in memory location
vector element is assumed to be a signed 32-bit number.
The program includes some sample data. It illustrates how the .word assembler directive can be used to load data
items into memory. The memory locations involved are those that follow the location occupied by the Branch
instruction, B, which is the last instruction in the program. The execution of the program ends by continuously
looping on this instruction.
.text
.global
_start:
LDR
LDR
LDR
MOV
LOOP:
LDR
LDR
MLA
SUBS
BGT
STR
STOP:
B
N:
.word
AVECTOR: .word
BVECTOR: .word
DOTP:
.space
.end
Observe the treatment of labels. In the instruction
Intel Corporation - FPGA University Program
November 2016
ARM
Dot product
N
. The computed result is written into memory location DOTP. Each
_start
R0, =AVECTOR
R1, =BVECTOR
R2, N
R3, #0
R4, [R0], #4
R5, [R1], #4
R3, R4, R5, R3
R2, R2, #1
LOOP
R3, DOTP
STOP
6
5, 3, 6, 19, 8, 12
2, 14, 3, 2, 5, 36
4
Figure 3. A program that computes the dot product of two vectors.
LDR R0, AVECTOR
®
P
U
I
ROCESSOR
SING
NTEL
n
elements. The required computation is
n 1
A(i)
B(i)
i 0
/* Register R0 is a pointer to vector
/* Register R1 is a pointer to vector
/* Register R2 is used as the counter for loop iterations. */
/* Register R3 is used to accumulate the product. */
/* Load the next element of vector
/* Load the next element of vector
/* Compute the product of next pair of elements, */
/* and add to the sum. */
/* Decrement the counter. */
/* Loop again if not finished. */
/* Store the result in memory. */
/* Specify the number of elements. */
/* Specify the elements of vector A. */
/* Specify the elements of vector B. */
/* Space for the final dot product. */
FPGA T
OOLCHAIN
A
. */
B
. */
A
. */
B
. */
For Quartus Prime 16.1
19
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