Pole Discordance Protection Ccpdsc - ABB RET650 Applications Manual

Section 7
Current protection
7.7
140
Protection
operate time
Normal t
The fault Retrip delay t1
occurs
Trip and Start
CCRBRF
IEC05000479 V2 EN-US
Figure 58: Time sequence
t2MPh: Time delay of the back-up trip at multi-phase start. The critical fault
clearance time is often shorter in case of multi-phase faults, compared to single
phase-to-earth faults. Therefore there is a possibility to reduce the back-up trip
delay for multi-phase faults. Typical setting is 90 – 150 ms.
t3: Additional time delay to t2 for a second back-up trip TRBU2. In some
applications there might be a requirement to have separated back-up trip functions,
tripping different back-up circuit breakers.
tCBAlarm: Time delay for alarm in case of indication of faulty circuit breaker.
There is a binary input CBFLT from the circuit breaker. This signal is activated
when internal supervision in the circuit breaker detect that the circuit breaker is
unable to clear fault. This could be the case when gas pressure is low in a SF6
circuit breaker. After the set time an alarm is given, so that actions can be done to
repair the circuit breaker. The time delay for back-up trip is bypassed when the
CBFLT is active. Typical setting is 2.0 seconds.
tPulse: Trip pulse duration. This setting must be larger than the critical impulse
time of circuit breakers to be tripped from the breaker failure protection. Typical
setting is 200 ms.

Pole discordance protection CCPDSC

cbopen
t after re-trip
cbopen
t
BFPreset
Minimum back-up trip delay t2
Critical fault clearance time for stability
1MRK 504 169-UEN A
Margin
IEC05000479_2_en.vsd
Transformer protection RET650 2.2 IEC
Application manual
Time
IP14516-1 v5