Analog Output Hold/Clear Function - Mitsubishi Q62DA User Manual

Logic, melsec-1 series
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3 SPECIFICATIONS

3.2.2 Analog output HOLD/CLEAR function

D/A conversion
enable/disable
Setting (Un\G0)
Setting
combination
CH
output
execution
enable/disable
status
flags (Y1 to Y8)
HOLD/CLEAR
setting
Analog output status when PLC
CPU is running
Analog output status when PLC
CPU is stopped
Analog output status when a
PLC CPU stop error occurs
Analog output status when a
1
watchdog timer
error occurs
in Q64DA, Q62DA, Q68DAV or
Q68DAI
1 This occurs when program operations are not completed within the scheduled time due to a hardware
problem of the D/A conversion module. When a watchdog timer error occurs, module READY (X0) turns
OFF and the D/A conversion module RUN LED turns off.
3 - 11
Whether the output analog value will be retained or cleared according to the PLC CPU
operating status (RUN, STOP, and Stop error) can be set using the intelligent function
module switch (see Section 4.5).
Table 3.3 lists available analog output status based on the combinations of D/A
conversion enable/disable and CH
Perform settings according to the system application.
Table 3.3 Analog output status combination list
Enable
HOLD
CLEAR
Outputs the analog value of
the D/A converted digital
value.
Hold
Hold
0 V/0 mA
0 V/0 mA
POINT
Design the system so that the D/A conversion enable/disable setting (Un\G0)
changes to "Enable" after the external power (see Section 4.3) is supplied.
Analog output may not properly be performed if the external power is not at the
specified voltage.
output enable/disable.
Enable
Disable
HOLD or CLEAR
Offset
Offset
Offset
Offset
Offset
0 V/0 mA
MELSEC-Q
Disable
Enable or disable
HOLD or CLEAR
0 V/0 mA
0 V/0 mA
0 V/0 mA
0 V/0 mA
3 - 11

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