Sbi (System Break Interrupt) Control Register - Mitsubishi 32172 User Manual

5

5.3.3 SBI (System Break Interrupt) Control Register

SBI (System Break Interrupt) Control Register (SBICR)
D0
D Bit Name
0-6 No functions assigned
7 SBIREQ (SBI request)
W = : Writable for only clearing (see the explanation below)
The SBI (System Break Interrupt) is an interrupt generated by a falling edge of the SBI input signal.
When an SBI interrupt occurs, the SBI Control Register SBIREQ (SBI request) bit is set to 1. The
SBIREQ bit cannot be set in software. To clear the SBIREQ bit after being set, follow the procedure
described below. (However, do not perform this clearing operation unless an SBI request has been
generated.)
• Write a 1 and then a 0 to SBIREQ.
1 2 3
Function
0: SBI not requested
1: SBI requested
5-9
INTERRUPT CONTROLLER (ICU)
5.3 ICU Related Registers
<Address: H'0080 0006>
4 5 6 D7
SBIREQ
<When reset: H'00>
R W
0 –
___
Rev.1.0