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ADLINK Technology NuDAQ Manuals
Manuals and User Guides for ADLINK Technology NuDAQ. We have
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ADLINK Technology NuDAQ manuals available for free PDF download: User Manual
ADLINK Technology NuDAQ User Manual (96 pages)
PCI-7200 / cPCI-7200 / LPCI-7200S 12MB/S High Speed Digital I/ O Card
Brand:
ADLINK Technology
| Category:
I/O Systems
| Size: 0 MB
Table of Contents
Table of Contents
5
List of Tables
10
1 Introduction
13
Applications
13
Features
14
Specifications
15
Supporting Software
17
Programming Library
17
DAQ-LVIEW Pnp: Labview® Driver
18
PCIS-VEE: HP-VEE Driver
18
PCIS-OCX: Activex Controls
18
Dasylabtm PRO
18
PCIS-DDE: DDE Server and Intouchtm
18
PCIS-ISG: Isagraftm Driver
19
PCIS-ICL: Incontroltm Driver
19
PCIS-OPC: OPC Server
19
2 Installation
21
Contents
21
Unpacking
22
Device Installation for Windows Systems
22
PCI-7200/Cpci-7200/LPCI-7200S Layout
23
Figure 2-1: PCI-7200 Layout Diagram
23
Figure 2-2: Cpci-7200 Layout Diagram
24
Figure 2-3: LPCI-7200S Layout Diagram
25
Figure 2-4: LPCI-7200S with Standard PCI Bracket
26
Hardware Installation Outline
27
Connector Pin Assignments
28
PCI-7200 Pin Assignments
28
Figure 2-5: CN1 Pin Assignments
29
Figure 2-6: CN2 Pin Assignments
29
Cpci-7200 Pin Assignments
30
Figure 2-7: CN Pin Assignments
30
LPCI-7200S Pin Assignments
31
Table 2-1: CN1A Pin Assignments
31
Table 2-2: CN1B Pin Assignments
32
8254 For Timer Pacer Generation
33
Figure 2-8: 8254 Configuration
33
LPCI-7200S PCI Bus Signaling
34
Onboard Pull-Ups and Terminations in Digital Input
34
Table 2-3: Pull-Ups and Termination of Pci/Cpci-7200 and LPCI
34
Figure 2-9: Digital Input Pull-Up Resistor and Termination Circuit Diagram
35
3 Register Format
37
I/O Registers Format
37
Digital Input Register (BASE + 10)
37
Digital Output Register (BASE + 14)
38
DIO Status & Control Register (BASE + 18)
38
Interrupt Status & Control Register (BASE + 1C)
41
8254 Timer Registers (BASE + 0)
44
4 Operation Theory
45
Direct Program Control
45
Timer Pacer Mode
46
External Clock Mode
47
Handshaking
48
Timing Characteristic
50
5 C++ Libraries
53
Libraries Installation
54
Programming Guide
55
Naming Convention
55
Data Types
55
Table 5-1: Data Types
55
7200_Initial
56
Description
56
Syntax
56
Argument
56
Return Code
56
7200_Switch_Card_No
58
Description
58
Syntax
58
Argument
58
Return Code
58
7200_Aux_Di
59
Description
59
Syntax
59
Argument
59
Return Code
59
7200_Aux_Di_Channel
60
Description
60
Syntax
60
Argument
60
Return Code
60
7200_Aux_Do
61
Description
61
Syntax
61
Argument
61
Return Code
61
7200_Aux_Do_Channel
62
Description
62
Syntax
62
Argument
62
Return Code
62
Description
63
Syntax
63
Argument
63
Return Code
63
7200_Di_Channel
64
Description
64
Syntax
64
Argument
64
Return Code
64
7200_Do
65
Description
65
Syntax
65
Argument
65
Return Code
65
7200_Do_Channel
66
Description
66
Syntax
66
Argument
66
Return Code
66
7200_Aux_Do_Channel
66
Sponding Channel
66
Channel Means each Bit of Digital Input Port
66
7200_Alloc_Dma_Mem
67
Description
67
Syntax
67
Argument
67
Visual C++ (Windows 95)
67
Visual Basic (Windows 95)
67
Return Code
68
7200_Free_Dma_Mem
69
Description
69
Syntax
69
Argument
69
Return Code
69
Return Code Err_Noerror
69
7200_Alloc_Dbdma_Mem
70
Description
70
Syntax
70
Argument
70
Return Code
70
7200_Free_Dbdma_Mem
71
Description
71
Syntax
71
Argument
71
Return Code
71
7200_Di_Dma_Start
72
Description
72
Syntax
73
Argument
74
Return Code
75
7200_Di_Dma_Status
76
Description
76
Syntax
76
Argument
76
Return Code
76
7200_Di_Dma_Stop
77
Description
77
Syntax
77
Argument
77
Return Code
77
7200_Dblbuffermode
78
Description
78
Syntax
78
Argument
78
Return Code
78
7200_Checkhalfready
79
Description
79
Syntax
79
Argument
79
Return Code
79
7200_Dblbuffertransfer
80
Description
80
Syntax
80
Argument
80
Return Code
80
7200_Getoverrunstatus
81
Description
81
Syntax
81
Argument
81
Return Code
81
7200_Do_Dma_Start
82
Description
82
Syntax
82
Argument
82
Return Code
83
7200_Do_Dma_Status
84
Description
84
Syntax
84
Argument
84
Return Code
84
7200_Do_Dma_Stop
85
Description
85
Syntax
85
Argument
85
Return Code
85
7200_Di_Timer
86
Description
86
Syntax
86
Argument
87
Return Code
87
7200_Do_Timer
88
Description
88
Syntax
88
Argument
89
Return Code
89
6 Double Buffer Mode Principle
91
Figure 6-1: Double Buffer Mode
91
7 Limitations
93
Warranty Policy
95
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ADLINK Technology NuDAQ User Manual (82 pages)
128-CH/64-CH Isolated Digital I/O Cards
Brand:
ADLINK Technology
| Category:
I/O Systems
| Size: 1 MB
Table of Contents
Table of Contents
7
List of Figures
11
1 Introduction
13
Features
14
Applications
14
Specifications
15
Unpacking Checklist
17
Software Support
18
Programming Library
18
DAQ-LVIEW Pnp: Labview® Driver
18
Daqbenchtm: Activex Controls
19
2 Hardware Information
21
Card Layout
21
Figure 2-1: PCI-7442 Layout
21
Figure 2-2: PCI-7443 Layout
22
Figure 2-3: PCI-7444 Layout
23
Bracket Layout
24
Figure 2-4: PCI-7440 Series Card Bracket
24
Figure 2-5: PCI-7440 Series Connector Pin Reference
24
PCI-7442 Pin Assignments
25
CN2 Connector
25
CN1 Connector
27
PCI-7443 Pin Assignments
29
CN2 Connector
29
CN1 Connector
31
PCI-7444 Pin Assignments
33
CN2 Connector
33
CN1 Connector
35
TTL I/O Connector Pin Assignments
37
Jp3
37
Jp4
37
Board ID (S1)
38
3 Operation Theory
39
Isolated Digital Input
39
Figure 3-1: Photo Coupler
39
Change of State (COS) Interrupt
40
Overview
40
COS Detection
40
Figure 3-2: COS Timing
40
COS Detection Architecture
41
Figure 3-3: COS Detection Architecture
41
Isolated Digital Output Channels
42
Figure 3-4: Common Ground Connection of Isolated Digital Output
42
Watchdog Timer (WDT)
43
Programmable TTL Input/Output
43
PCI-7442 I/O Registers
45
COS Interrupt Control Registers
46
Interrupt Status, COS INT Control Read Back Registers
48
COS Setup/Latch Registers
49
TTL IO Setup, Status, DO and DI Registers
50
Isolated Digital Output and Read Back Registers
52
Power-Up DO Setup/Read Register
54
Watchdog Timer Load, Safety DO Setup/Read Back Regis Ters
55
WDT INT Control, Hot-Reset, and Hold Control Register
57
PCI-7443 I/O Registers
59
COS Interrupt Control Registers
60
Interrupt Status, COS INT Control Read Back Registers
63
COS Setup/Latch Registers
65
Ttl IO Setup, Status, Do and DI Register
67
Address Base+0X0Ch Base+0X4Ch Bit Value
67
Base+0X0Ch Base+0X4Ch
67
Through the TTL I/O Output Channel
68
Address Base+0X0Eh Base+0X4Eh Bit Value
68
R/W Value Mapping (MSB
68
PCI-7444 I/O Registers
69
Power-Up DO Setup/Read Back Register
71
WDT Load Config, Safety DO Setup/Read Back Registers
73
WDT INT Control / Hot-Reset Hold Control Register
75
0: I/O Direction Is Input. (Default) 1: I/O Direction Is Output
77
0: Output in Low Logic. (Default) 1: Output in High Logic
77
TTL IO Setup, Status, DO and DI Registers
77
Handling PCI Controller Registers
79
Warranty Policy
81
ADLINK Technology NuDAQ User Manual (71 pages)
12MB/S High Speed Digital Input/ Output Card
Brand:
ADLINK Technology
| Category:
PCI Card
| Size: 0 MB
Table of Contents
Table of Contents
5
How to Use this Guide
7
Chapter 1 Introduction
9
Applications
9
Features
10
Specifications
10
Software Supporting
12
Programming Library
12
PCIS-LVIEW: Labview Driver
13
PCIS-VEE: HP-VEE Driver
13
Daqbench
13
Dasylab TM PRO
13
Activex Controls
13
PCIS-DDE: DDE Server and Intouch
13
PCIS-ISG: Isagraf
14
TM Driver
14
PCIS-ICL: Incontrol
14
PCIS-OPC: OPC Server
14
Chapter 2 Installation
15
What Included
15
Unpacking
16
Device Installation for Windows Systems
16
PCI-7200/Cpci-7200/LPCI-7200S's Layout
17
Hardware Installation Outline
21
Connector Pin Assignments
22
PCI-7200 Pin Assignments
22
Cpci-7200 Pin Assignments
24
LPCI-7200S Pin Assignments
25
8254 For Timer Pacer Generation
27
LPCI-7200S PCI Bus Signaling
28
Onboard Pull-Ups and Terminations in Digital Input
28
Chapter 3 Register Format
29
I/O Registers Format
29
Digital Input Register (BASE + 10)
30
Digital Output Register (BASE + 14)
30
DIO Status & Control Register (BASE + 18)
30
Interrupt Status & Control Register (BASE + 1C)
32
8254 Timer Registers (BASE + 0)
35
Chapter 4 Operation Theory
37
Direct Program Control
37
Timer Pacer Mode
38
External Clock Mode
39
Handshaking
39
Timing Characteristic
41
Chapter 5 C/C++ Libraries
45
Libraries Installation
45
Programming Guide
46
Naming Convention
46
Data Types
46
7200_Initial
47
7200_Switch_Card_No
48
7200_Aux_Di
48
7200_Aux_Di_Channel
49
7200_Aux_Do
49
7200_Aux_Do_Channel
50
7200_Di_Channel
51
7200_Do
51
7200_Do_Channel
52
7200_Alloc_Dma_Mem
53
7200_Free_Dma_Mem
54
7200_Alloc_Dbdma_Mem
54
7200_Free_Dbdma_Mem
55
7200_Di_Dma_Start
55
7200_Di_Dma_Status
58
7200_Di_Dma_Stop
59
7200_Dblbuffermode
59
7200_Checkhalfready
60
7200_Dblbuffertransfer
60
7200_Getoverrunstatus
61
7200_Do_Dma_Start
61
7200_Do_Dma_Status
62
7200_Do_Dma_Stop
63
7200_Di_Timer
64
7200_Do_Timer
65
Chapter 6 Double Buffer Mode Principle
67
Chapter 7 Limitations
69
Warranty
71
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