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5-2-4. Timer circuit
(1) ON delay circuit
0
Continuous input
P
Step NO.
100
104
Instruction Ipevi&
ko:
I
T 3
9
. A N
r
T
3
l O O U T Y
s A 9
7'3
S M 4 6
I
I
:T+z=
y A 8
y A 9
limit
47 sec
Fig.
5-8<. ON delay timer circuit
(1)
0 1 Instantaneous input
110
XI.
;
xi!
\
T4,M50
)
__-r
Setting time limit
YBO
y B 1
6.2 sec
Fig. 5-9. ON delay timer circuit (2)
M4Q corresponds to the
instantaneous contact
of T3,
l - - - - l - l
Step
No.
Instruction Device No.
This is an ON delay circuit
by the instantaneous input
*
X l and X 2
The temporary memory
M50 is required for self-
holding.
186-
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