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and more about Sharp
PC-1500
at http://www.PC-1500.info
2-2-2.
Internal registers
Symbol
Name
Bit size
ocsc1iptlon
p
Progra
rn
C
<ninter
16
Indicates the
address
next to
th
e
;)(!dress
the CPU
is no\•1
in
ex
ecution
II
will
be
incre
men1
ed
by
"
1-
' . .
'
Jhen tho
next
instruclion
is 1 e1
c::ho<f.
s
s~ack
16
lndica1cs the
stack
address.
poirnc'
A
A cc
v
mulatoc
s
U
sed tor
retention of
c
p.eralional <esull
or f
or
d
ata
!rans.fe
r
•vilh
the
ex1c
rna1
mcrnofy.
Xrcg
X
L
8
XL.
XH.
YL
.YH.Ul.
UH
compris-e
ind
ependen;
8·
XH
8
bit
registers.
Also.
used as
1&.bit
data
poin;ers.
x
rcg.
Yrcg
.
and
YL
I
8
Urcg
.
.....
hen
used
in
a
pair.
Yreg
YH
Oeta
register
8
UL
8
Ureg
UH
8
TM
Ti
mer
coun1cr
9
v.
1
hen
''O.,
is
set
to !he
TM. it
steps
t
he
counler
ac~
1on.
Whcr'
an;•th1
n
g Olhc
r
lh
an "O
..
is
SCI.
1
;
puts
the counter into
ac?ion.
When
the
TM
lu
~ns
full o
f
..
1··
·
1
1ith
ti'~
in1euupt
enable
s
ig
n<)l
IE
on.
CPU
executes
an
1
ntcrtup1
p
rocessing.
PU
1
Genefal
Pt•rpose
flip
-Hep.
PV
1
D
ISP
1
LCO
oo/
olf co1
nro1.
T
S1;;.1os
re~1ist
et
8
LO\v
otdef
5
bits
f Opfesan1
one
of
f1
\'C
status
o
f
o
peta11
o
nal
result
2-2-3. Status flags
S1
atus
flag~.
C.
\'.
f~.
Z.
11'
· :
a
rc
c<u1taincd
in
the
8-bit
status
register.
In
general
.
tlag.'\(Hhcr
tha
n
IE
change
their
scatc
after
the
execution
of
arit
h£netical
instructio
n.
Status
register
T
=
[
0
'
0
I
0
H
I
V Z
j
1
E
C
I
(i)
Ca:rry
flag
c
Cat"ry flag
C
is
set
\vhcn
there is
<
'
carry
fron1
t
l1i:
MS ll and rcst.:t
\vhr,;1
1
there
is
n<>
carry.
~:o
..
SlJBTR.
t \Cl',
the
nag
is
:set
\VhCn
there
is
no borrO\V
or rl'f\Ct
\V
ht
n
there is.
<D
Ha
If
carry flag H
Half
carry
llag H
is
set
when
there
is
a carry
from
the
bi
t
position
"3"
(digit-to-digit
car.ry)
and
res
et
\vhcn
there
is no
cal'ry.
<D
Zero
flag
Z
Zero
nag
z
is sr:t \Vhcn
the
()per'at
ional
l'C' S
llh
is
7Cl'O
anti
reset
\\- '
h
en
n<H
.
©
Overflow flag V
Overnow nag V
is
set
or
reset
depending
on
the
operational
result of
..
C6<:bCT:
where.
the
carry fro
m
the
bit
posi ti
on
6
of
a
single
byte
data
is
assumed
to b~
C6
and
thc
carr~·
from
t he bit
position
7
to
be
C7.
Single byte data
87 9695
94
9382
8
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