Keithley 7072 Instruction Manual page 75

Semiconductor matrix card
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SERVICE INFORMATION
Table 4-3. Troubleshootlng
Procedure
CT-..
II_-. Jn^----^-l
arep
~rrm,~""qJ"',rIlr
"^-..:..^-I r-^-A:&:-..
NqUlLSU
LUIIUIIIUII
rn."...,..dc
L"fiI,ULS&,LD
1
TP2
All voltages referenced to TP2 (digital
COllUTlO*)
2
TPl
+6VDC
Relay voltage
3
TP3
+5VDC
Logic voltage
4
TP4
NEXT ADDR pulses
Power up only (Fig. 4-8)
5
TP5
CLR ADDR pulse
Power up only (Fig. 4-8)
6
TP6
ID data pulses
Power up only (Fig. 4-8)
7
TP7
STROBE pulse
End of relay data sequence.
8
TP8
Relay data (128 bits)
Present when updating
relays.
9
Tl='9
CLK pulses
Present during relay data or ID data.
10
TPlO
High on power up until first
Power on safe guard.
STROBE sets low.
11
U30-U45, pins lo-18
Low with relay energized,
high
Relay driver outputs
with relay de-energized.
CARDSELl
CLRADDR
(TP5)
l-l
NEXTADDR
(TP4)
CLK (TP9)
IDDATA (TP6)
Note : ID data sequence
wc"rs
on power-up only.
CLRADDR
pulse occurs only once.
Figure 4-8. ID Data Timing
4-11
I

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