Keithley 7072 Instruction Manual page 61

Semiconductor matrix card
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APPLICATIONS
Connections to a user-supplied
test fixture should be made
using triax cables in order to maintain
path integrity
and
safety. BNC cables and adapters should not be used in case
hazardous
potential
appears on guard terminals.
3.5.3 SPA Measurement
Considerations
A complete
discussion
of SPA measurements
is well
beyond the scope of this manual. However, there are a few
points that should be kept in mind when using this ar-
rangement.
Additional
measurement
considerations
may
be found in Section 2, paragraph
2.7 of this instruction
manual.
Any switching
system can degrade low-level signals, and
the same hold true for the system shown in Figure 3-10.
Since rows A and B on the Model 7072 are dedicated low
current pathways, the SMUs that will source or sense low-
level signals should be connected only to these rows. The
remaining
rows can be used for less-critical
signals.
Safety considerations
are also a concern when connecting
instruments
to a switching
matrix. Therefore, it is strong-
ly recommended
that you carefully
read the HP 41458
-
manual before using the system.
WARNING
Hazardous voltage may be present on the outer
conductors of the connecting cables when the
HP 41458 is set up for floatlng measurements.
3.5.4 Typical Test Procedure
The following
paragraphs outline the procedure for using
the SPA/matrix
system to perform a typical test: V,&,
(common-source)
curves of a typical JFET. The procedure
uses one of the four standard setups that are part of the
applications
package supplied
with the HP 41458.
System Configuration
Figure 3-12 shows the configuration
and connections
for
this example. Only three of the four SMLJs are required
for the test, as indicated in the figure. A total of four FETs
can be connected to a single card, as shown on the dia-
gram. In all cases, triax cabling should be used. The cross-
points to close to test a specific FET are summarized
in
Table 3-3.
Table 3-3. Crosspoint
Summary
for JFET Test
JFET
Crosspoints
Closed*
Tested
(Source, Gate, Drain)
I
1
A2, Cl, B3
2
A5, C4, B6
3
As, 0, 89
4
All.
ClO. 812
* Crosspoints
from Figure 3-12
Procedure
1. Connect the system and devices together, as shown in
Figure 3-12.
2. Turn on the HP 41458 and allow it to go through
its
boot-up routine.
3. Turn on the Model 707 Switching
Matrix.
4. From the HP 41458 main menu, select the channel
definition
page,
then
choose
the
FET VDsIo
application.
5. Press the PAGE NEXT key, and program the source
parameters, as required.
6. Press the PAGE NEXT key, and program the required
graphing
parameters.
7. Press the PAGE NEXT key to display the graph format.
8. From the front panel of the Model 707, close the cross-
points necessary to connect the FET being tested to the
SMUs (see Table 3-3).
9. Press the MEASUREMENT
SINGLE key to initiate the
sweep. The SPA will generate the ID vs. V, curves at
specified V,
values.
10. Open the crosspoints
presently
closed.
11. Repeat steps 8 and 9 for the remaining
devices, as
required.
l)-pica1 Plot
Figure 3-13 shows a typical plot made using the procedure
above. The device tested was a 2N4392 N-channel
JFET.
For the graphs, V,, was swept from OV to 1OV in O.lV in-
crements, and V,
was stepped from 0 to -025V.
3-15
I

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