IBM xSeries 450 Planning And Installation Manual page 18

CPU 1 CPU 2
6.4 GBps
CPU 3 CPU 4
400 MHz
64 MB
L4 cache
6.4 GBps
Processor-board assembly
RXE
Expansion
PCI bridge
Port A
(1 GBps)
66 MHz
Ultra320
SCSI
Gigabit
Ethernet
Figure 1-1 xSeries 450 system block diagram
What was called the SMP Expansion module in the x440 has been divided into
two components in the x450. The component that contains the CPUs,
processor/cache controller, and cache is called the
The component that contains the memory controller and memory is called the
memory-board assembly
The CPUs are connected together with a 200 MHz frontside bus, but supply data
at an effective rate of 400 MHz using the "dual-pump" design of the Intel
Itanium 2 architecture as described in 1.4, "Intel Itanium 2 processor" on
page 10. To ensure the processors are optimally used, the x450 has a 64 MB
XceL4 Server Accelerator Cache, comprised of 200 MHz DDR memory. This L4
system cache services all CPUs.
IBM ^ xSeries 450 Planning and Installation Guide
4
SDRAM
SDRAM
SMI-E
Processor &
cache
controller
3.2 GBps
66 MHz
33 MHz
Video
3x USB
Serial
RSA
.
SDRAM SDRAM
SDRAM SDRAM
SMI-E SMI-E
Port 1 Port 2
3.2 GBps 3.2 GBps
Memory
controller
1 GBps 1 GBps
Bus A
PCI bridge
B-100 C-133
64-bit 64-bit
66 MHz 100 MHz 133 MHz
processor-board assembly
SDRAM
SDRAM
SMI-E
200 MHz
2-way or 4-way
interleaved DDR
Memory-board assembly
RXE
Expansion
Port B
(1 GBps)
D-133
IBM XA-64
("Summit")
64-bit
core chipset
.