A-D Conversion-Completion Flag; Setting Resolution - Mitsubishi Electric MELSEC A Series Manual

Programmable logic controller
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3. SPECIFICATIONS
3.7.5

A-D conversion-completion flag

3.7.6

Setting resolution

(1) When the power is turned ON, the A – D conversion-ready signal (X1) goes ON
This indicates that the A – D conversion-completion flag is ready for all chan-
nels from 1 to 8. OOFFH is stored in buffer memory.
(2) After the power is turned ON, A/D conversion-completion flag processing is only
done once if the setting for A – D conversion-enabled/disabled at address 0 is
changed.
• A – D conversion-disabled → enabled:
When averaging processing is specified, averaging processing is executed a
preset number of times or for a preset length of time of averaging. After the
processing is completed, the digital value (obtained after A-D conversion) is
then stored in buffer memory. The flag is then set to 1.
• A – D conversion-enabled → disabled:
The relevant channel's A – D conversion-completion flag is set to 0.
(3) Each channel has an A-D conversion-completion flag.
b15 b14 b13 b12 b11 b10 b9
Address 0
0
0
0
(4) The A/D conversion-completion flag can be used for the interlock when reading
the digital value of the channel for which averaging processing has been
executed.
(1) Set the digital output value resolution to "1/4000", "1/8000", or "1/12000".
When the power is turned ON, the default is set at 1/4000.
(2) Write a number (1 to 3) to address 20 corresponding to the required resolution.
Setting
Resolution
1
1/4000
2
1/8000
3
1/12000
POINT
Only set the resolution once while the PC CPU is running and before the A-D
conversion-enabled/disabled setting is made.
If the setting is changed while the A-D conversion is set for enabled, the
correct digital output values will not be obtained.
b8
b7
0
0
0
0
0 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1
A – D conversion-completion flag
1: A – D conversion completed
0: A – D conversion not completed
3 − 18
0(/6(&0$
0(/6(&0$
0(/6(&0$
0(/6(&0$
MELSEC-A
b6
b5
b4
b3
b2
b1
b0

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