Counter Input; Trigger Input; Sync I/O - Measurement Computing us-1208fs User Manual

USB-1208FS User's Guide
If the p/n of your board is earlier than hardware revision D, the default configuration is pull-up. To configure
for pull-down, the board must be modified at the factory.
If your board has user-configurable jumpers, complete the following steps to set the pull-up/down
configuration:
1. Unplug the device from the computer.
2. Turn the device over and rest the top of the housing on a flat, stable surface.
Caution! The discharge of static electricity can damage some electronic components. Before removing the
USB-1208FS from its housing, ground yourself using a wrist strap or touch the computer chassis
or other grounded object to eliminate any stored static charge.
3. Remove the three screws from the bottom of the device using a #1 Philips head screwdriver.
4. Hold both the top and bottom sections together, turn the device over and rest it on the surface, then
carefully remove the top section of the case to expose the circuit board.
The user-configurable jumpers are labeled
jumper on the circuit board.
5. Configure each jumper for pull-up or pull-down, as shown in Figure 10. Use the jumper labeled
configure Port A, and
6. Replace the top section of the housing, and fasten it to the bottom section with the three screws.

Counter input

The terminal is a 32-bit event counter that can accept frequency inputs up to 1 MHz. The internal counter
CTR
increments when the TTL levels transition from low to high.

Trigger input

The terminal is an external digital trigger input that you can configure for either rising or falling edge.
TRIG_IN

SYNC I/O

The terminal is a bidirectional I/O signal that can be configured as an input (default) or an output.
SYNC

Configure as an external clock input to externally source the A/D conversions. The SYNC terminal
supports TTL-level input signals of up to 50 kHz.
DIO A
Figure 9. Pull-up/down jumper locations
DIO B to configure Port B.
Figure 10. Pull-up/down jumper configuration
15
and . Figure 9 shows the location of the each
DIO B
Functional Details
to
DIO A