Advantech ARK-3520P series User Manual page 65

3.2.3.8 PCI Express Configuration

PCI Express Clock Gating
Enable or disable PCI Express Clock Gating for each root port.

DMI Link ASPM Control
Enable/Disable the control of Active State Power Management on SA side of the
DMI Link.

PCI Express Root Port 1/2/3/4/7/8/9
PCI Express Port 1/2/3/4/7/8/9 Settings.
55 ARK-3520P User Manual