Infineon Technologies XC2200 User Manual page 603

Field Bits
PHA [1:0]
Note: The register TCONCS4 controls the chip select CS4, that is available only in the
144-pin package.
TCONCS7
Timing Cfg. Reg. for CS7
15 14 13 12
- WRPHF RDPHF
- r
Field Bits
WRPHF [14:13] r
RDPHF [12:11] r
PHE [10:6]
PHD 5
PHC [4:3]
PHB 2
PHA [1:0]
Note: CS7 is used and defined for internal access to the LXBus peripherals MultiCAN
and USIC.
User's Manual
EBC_X8, V1.0d1
Type Description
rw Phase A
00
B
...
11
B
XSFR (EE48
11 10 9
PHE
r
Type Description
Write Phase F
00
B
Read Phase F
00
B
r Phase E
00000
r Phase D
0
B
r Phase C
00
B
r Phase B
0
B
r Phase A
00
B
System Units (Vol. 1 of 2)
The External Bus Controller EBC
0 clock cycles
...
3 clock cycles
/--)
H
8 7 6 5
PHD
r r
0 clock cycles
0 clock cycles
1 clock cycle
B
0 clock cycles
0 clock cycles
1 clock cycle
0 clock cycles
9-19
XC2200 Derivatives
Reset Value: 0000
4 3 2 1
PHC PHB PHA
r r
V2.1, 2008-08
H
0
r