Infineon Technologies ICE2PCS Series Design Manual

For boost type ccm pfc

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AADesign Guide for ICE2PCSxxApp
Application note, Ver 1.0, May 2008
D e s i g n G u i d e f o r B o o s t T y p e C C M P F C w i t h
I C E 2 P C S x x
P o w e r M a n a g e m e n t & S u p p l y
N e v e r
s t o p
t h i n k i n g .

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Summary of Contents for Infineon Technologies ICE2PCS Series

  • Page 1 AADesign Guide for ICE2PCSxxApp Application note, Ver 1.0, May 2008 D e s i g n G u i d e f o r B o o s t T y p e C C M P F C w i t h I C E 2 P C S x x P o w e r M a n a g e m e n t &...
  • Page 2 Infineon Technologies Components may only be used in life-support devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system.
  • Page 3 Previous Version: none Page Subjects (major changes since last revision) Design Guide for Boost Type CCM PFC with ICE2PCSxx License to Infineon Technologies Asia Pacific Pte Ltd AN-PS0029 Liu Jianwei Luo Junyang Jeoh Meng Kiat We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document.
  • Page 4: Table Of Contents

    ICE2PCSxx Table of Contents Page Introduction ...........................5 Boost PFC design with ICE2PCXX ....................7 Target specification .........................7 Bridge rectifier ..........................7 Power MOSFET and Gate Drive Circuit ..................7 Boost Diode.............................8 Boost inductor ..........................9 AC line current filter........................11 Boost Output Bulk Capacitance ....................12 Current Sense Resistor.........................12 Output voltage sensing divider......................13 2.10...
  • Page 5: Introduction

    Abstract ICE2PCS01/02 are the 2 generation of Continuous Conduction Mode (CCM) PFC controllers, which BiCMOS employ technology. Its control scheme does not need the direct sine-wave sensing reference signal from the AC mains compared to the conventional PFC solution. Average current control is implemented to achieve the unity power factor.
  • Page 6 Rectifier EMI Filter =400VDC VIN=85V ...265V AC SENSE GND VSENSE ISENSE GATE Auxiliary Supply ICE2PCS01 ICOMP FREQ VCOMP FREQ Figure 2 Typical application circuit of ICE2PCS01 Rectifier EMI Filter =400VDC VIN=85V ...265V AC SENSE GND VSENSE ISENSE GATE ICE2PCS02 Auxiliary Supply VINS VCOMP ICOMP...
  • Page 7: Boost Pfc Design With Ice2Pcxx

    Boost PFC design with ICE2PCXX Target specification The fundamental electrical data of the circuit are the input voltage range Vin, the output power Pout, the output voltage Vout, the operating switching frequency f and the value of the high frequency ripple of the AC line current I .
  • Page 8: Boost Diode

    Pout of 100 W to120 W in a CCM-PFC-system per one rated ampere. For example, the SDT04S60 from Infineon Technologies is rated at a forward current IF = 4 A, so it is capable for a system of Pout = 4*100 W = 400 W system in minimum.
  • Page 9: Boost Inductor

    The SiC boost diodes often have a poor surge current handling capability. Therefore a so called bypass diode is necessary such as the diode D3 as Figure 4. For the proposed system, 1N5408 is suitable. Rectifier SENSE Figure 4 inrush current bypass diode Boost inductor The peak current that the inductor must carry is the peak line current at the lowest input voltage plus the high frequency ripple current.
  • Page 10 µ µ ≥ ⋅ − ⋅ − (15) boost µ µ where, is the relative permeability of the material. It should be noted that changes with different DC magnetizing force H, and so does the inductance. As an example, Figure 5 illustrates the relationship between the Percent Permeability and the DC Magnetizing Force H.
  • Page 11: Ac Line Current Filter

    µ Then = 125 * 50% = 62.5 according to Figure 5. The actual inductance can be re-calculated as µ µ . Hence, the corresponding ripple current will be higher than the boost previously assumed value. The copper loss of the winding wire can be calculated on I in_RMS ⋅...
  • Page 12: Boost Output Bulk Capacitance

    The leakage inductance of EMI common mode choke can be used for current filter. If the leakage inductance is large enough, no need to add the additional differential mode inductor for filtering. Otherwise, a current filter choke is necessary. The calculation method for the current filter choke is the same as for boost choke. Boost Output Bulk Capacitance The bulk capacitance has to fullfil two requirements, output double line frequency ripple and holdup time.
  • Page 13: Output Voltage Sensing Divider

    According to Figure 2 and Figure 3, the transistor current as well as the diode current flows through R sense That means, when AC is powered up, a large negative voltage drop at R will be observed when large sense inrush current in the range of about 150 A to 200 A flows through the resistor.
  • Page 14: Ac Brown-Out Shutdown (Only For Ice2Pcs02)

    2.11 AC Brown-out Shutdown (only for ICE2PCS02) Brown-out occurs when the input voltage VAC falls below the minimum input voltage of the design (i.e. 85V for universal input voltage range) and the VCC has not entered into the VCCUVLO level yet. For a system without input brown out protection (IBOP), the boost converter will increasingly draw a higher current from the mains at a given output power which may exceed the maximum design values of the input current and lead to over heat of MOSFET and boost diode.
  • Page 15: Ic Supply

    Figure 9 Timing diagram of VINS Pin when IC enters brown-out shutdown If the bottom level of the ripple voltage touches 0.7V, PFC is in standby mode and gate is off. The ripple voltage defines PFC brown out off threshold of AC input voltage (RMS), V can be obtained from the AC_off ⋅...
  • Page 16: Pcb Layout Guide

    AUX supply IC Vcc input Cvcc delay 0.1uF 0.47uF Power on control Figure 10 Vcc supply circuitry Figure 10 is a typical circuitry to supply PFC controller. Q2 is NPN transistor and controlled by external “Power on” signal. When “Power on” signal is “high”, Q2 is turned on provides base current for Q1. Q1 is turned on accordingly to supply auxiliary power to IC Vcc.
  • Page 17: Voltage Loop And Current Loop Compensation

    Rectifier EMI Filter =400VDC VIN=85V ...265V AC SENSE ISENSE GATE VSENSE Cvsense ICEXPCS01 Auxiliary Supply Cvcc ICOMP FREQ VCOMP FREQ Figure 11 Good PCB layout illustration Voltage loop and current loop compensation This section provides a model and a tool for evaluating and improving the control loop characteristics of ICE2PCS02-based PFC pre-regulators in boost topology.
  • Page 18: How To Achieve Pfc Function Without Sinusoidal Reference Sensing

    How to achieve PFC function without sinusoidal reference sensing 3.1.1 Boost converter modeling Figure 13 shows the inductor current waveform for boost converter operating in continuous conduction mode. Figure 13 inductor current waveform of boost converter operating in CCM mode assuming Vin is boost converter input DC voltage, Vout is the boost converter output voltage, L is the boost choke inductance, ton is the on time duration in one switching cycle, toff is the off time duration in one switching cycle, doff is the off time duty cycle and Tsw is the time duration in one switching cycle.
  • Page 19: Current Loop Regulation And Transfer Function

    Boost converter − ⋅ ⋅ − doff IC PWM modulation doff=K*i Figure 14 PFC current loop principle IC senses boost inductor average current, and calculate the off duty cycle to be proportional to inductor current, and then send such off duty cycle back to boost converter. The negative feedback loop can be seen from Figure 14.
  • Page 20 Figure 16 current averaging block diagram The transfer function of averaging circuit block can be derived as below. sense icomp (35) icomp ⋅ where, K is a ratio between R501 and R7 which is equal to 4, C is the capacitor at Icomp Pin, g icomp OTA2 the trans-conductance of the error amplifier of OTA2 for current averaging, typical 1.0mS as shown in...
  • Page 21 Ramp Vicomp Comparator To PWM logic and gate driver block Vicomp Gate drive From protection logic Vramp=M2*Kfq Oscillator Tosc Figure 17 The block diagram and timing sequence of PWM comparator block The operating principle is explained as following. Gate output is in “low” state in the beginning of the each cycle.
  • Page 22: Voltage Loop Compensation

    The selected C must also meet the requirement that the cross over frequency of the current loop f icomp much lower than the switching frequency f 3.2.5 Steady state solution of I Solving the current loop in Figure 15, − −...
  • Page 23 PWM modulation G2(s) Output Stage G3(s) Voltage loop ∆ I ∆ ∆ Non- Output Stage ∆ Vcomp ∆ Error Amplifier linear inrms G1(s) ∆ Vsense Feedback Figure 19 Small signal modeling of voltage loop 3.3.1 Boost converter output stage G Boost converter output stage is described as influencing of variation on i to bulk output voltage Vout.
  • Page 24  Resistive Load  ∆  ⋅  (45) ∆   Constant Power Load  In this application note, the calculation is only carried out for constant power load situation ∆ I / ∆ I 3.3.1.2 L_rms The current source Iout can be characterized with the following considerations as shown in Figure 21. The low frequency component of the boost diode current is found by averaging the discharge portion of the inductor current over a given switching cycle.
  • Page 25 making a perturbation on I , (M ), V , then L_rms ∆ ∆ − ∆ (50) replacing ∆I by ∆V (s) according to voltage loop block diagram, L_rms ∆ ∆ − ∆ (51) then the transfer function of dV comp ∆...
  • Page 26 4.50 9.350E-01 2.911E+00 2.722E+00 4.75 9.351E-01 2.911E+00 2.722E+00 5.00 9.351E-01 2.911E+00 2.722E+00 Table 2 nonlinear block characteristic data M1*M2 Vcomp Figure 22 The characteristics of nonlinear block 3.3.4 Error Amplifier compensation G The circuit of error amplifier compensation circuit is shown in Figure 23. The sensing voltage Vsense is compared to internal reference voltage 3V typical.
  • Page 27 ∆ ∆ ∆ comp comp ⋅ ⋅ (54) ∆ ∆ ∆ sense sense where, g is the trans-conductance of OTA1, 42uS typically for ICE2PCS02. OTA1 With π π π (55) π The pole and zero are to regulate the overall voltage loop with the cross-over frequency below 100Hz and create the phase margin for the loop stability.
  • Page 28: Design Example

    As mentioned in Section 4.6, the inherent low bandwidth of voltage loop in PFC application will lead to slow response in case of sudden load step and result in large output overshoot or drop. Enhance dynamic response feature is integrated in ICE2PCS02 to have a fast response in the case of load step. The voltage loop with including enhance dynamic response block is shown in Figure 25.
  • Page 29: Vcomp And M1, M2 Value At Full Load Condition

    Vout=400VDC Cout=220uF/450V =125kHz Rsense=0.1ohm Boost choke inductance L=1.2mH (please note that the inductance may change at different choke current) Vsense divider: R1=390kohm*2=780kohm, R2=6kohm Vcomp and M1, M2 value at full load condition (1) 85VAC: RMS AC input current under full load: (58) η...
  • Page 30 (64) π sense ⋅ ⋅ inrms (2) 265VAC RMS AC input current under full load: (65) η ⋅ ⋅ inrms From equation (43), ⋅ ⋅ ⋅ sense (66) ⋅ inrms From table 2 and Figure 22, it can be obtained Vcomp M1*M2 2.25...
  • Page 31 3.5.1 Current Averaging Circuit With g =1.0mS from Datasheet, M1@85VAC, and assuming f =13kHz which is 10 times less than OTA2 switching frequency 125kHz, then − ⋅ ≥ (72) icomp π π ⋅ ⋅ ⋅ Select C =3.3nF icomp 3.5.2 Current Loop Regulation Insert M1 and M2 value in equation (40).
  • Page 32 85VAC full load 265VAC full load -100 -110 -120 -130 -140 -150 -160 -170 -180 f(HZ) Figure 27 The bode plot and phase angle for current loop The cross over frequency and phase margin are 3kHz and 75º for 85VAC, and 10kHz and 25º for 265VAC. Application Note 2008-08-01...
  • Page 33 3.5.3 Voltage Loop Regulation From the above sections, it can be obtained: ∆ π comp (73) ∆ π sense ∆ (74) ∆ comp ∆ (75) ∆ π ∆ sense 0077 (76) ∆ The open loop gain for voltage loop is to times all above factors together as: (s) is used to provide enough phase margin and also limit the bandwidth below 20HZ.
  • Page 34 π ⋅ ⋅ (78)   µ π ⋅ ⋅ ⋅   −   − ⋅   according to then π Ω (79) π ⋅ ⋅ ≈ select R4=33kΩ, and π π (80) π ⋅ ⋅ select C3=100nF The gain amplitude and phase angle of overall voltage loop G (s) at 85VAC and 265VAC in full load condition is shown in Figure 28 and Figure 29.
  • Page 35 Gv=G1*Gnon*G23*G4 Gnon*G23*G4 -100 -120 f(HZ) -100 -110 -120 -130 -140 -150 -160 -170 -180 f(HZ) Figure 28 the bode plot and phase angle for voltage loop at 85VAC and full load Application Note 2008-08-01...
  • Page 36 -100 -120 f(HZ) -100 -110 -120 -130 -140 -150 -160 -170 -180 f(HZ) Figure 29 The bode plot and phase angle for voltage loop at 265VAC and full load Application Note 2008-08-01...
  • Page 37 Luo Junyang, Liu Jianwei, Jeoh Meng Kiat, 300W CCM PFC Evaluation Board with ICE2PCS02, CoolMOS™ and SiC Diode thinQ!™, Application note, Infineon Technologies, Munich, Germany, Feb. 2007. Luo Junyang, Liu Jianwei, Jeoh Meng Kiat, ICE2PCSxx, New generation of BiCMOS technology,...

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