Supermicro 6018R-WTR User Manual page 15

Note: This is a general block diagram. Please see Chapter 5 for details.
SXB2
x16
RIGHT SLOT
PCIE 3.0 x16
SXB1B (lower)
x16
Left SLOT
PCIE 3.0 x16
#1
#1
PE3
#2
#2
F
E
#1 #1
2 #
#2
D
C
J35
x16
AOM
PCIE 3.0 x16
SXB1B (Upper)
Left SLOT
PCIE 3.0 x16
UL1
Dual LAN
NC _SI(RMII)
I350BT2
JLAN1
JLAN2
RJ45
RJ45
32MB BMC
SPI FLASH
DDR3
VGA
Figure 1-1. Intel PCH-C612 Chipset:
System Block Diagram
PE2 PE1
DMI
H
CPU Rear
SocketID 01
PROCESSOR
P0 P1
P0
P1
CPU FRONT
B
SocketID 00
PROCESSOR
PE3
PE2 DMI
PE1
x16
DMI
PET [3,4,6,7]
x8
16MB BIOS
SPI
SPI FLASH
PET5
BMC
AST2400
PHY
RTL8211E
COM1
HWM
#1 SXB1A
#1
#2
#2
G
SXB1B
#1
#1
2 # #2
A
SXB1C
sSATA
[0..3]
Gen3
SATA Gen3 [0..5]
PCH
USB2.0 [0..5]
port 0,1
USB3.0 [1..6]
USB2.0 [6] LPC
REAR
TPM Header
IPMI LAN
RJ45
1-5
Chapter 1: Introduction
WIO Slots
SXB2
PCIE x16
Right Slot
Left Slot
2,3
REAR
4,5