Atmel AVR AT90S8515-4 Specification Sheet page 5

RESET
XTAL1
XTAL2
ICP
OC1B
ALE
0841GS–09/01
current if the pull-up resistors are activated. The Port D pins are tri-stated when a reset
condition becomes active, even if the clock is not active.
Port D also serves the functions of various special features of the AT90S8515 as listed
on page 73.
Reset input. A low level on this pin for more than 50 ns will generate a reset, even if the
clock is not running. Shorter pulses are not guaranteed to generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
ICP is the input pin for the Timer/Counter1 Input Capture function.
OC1B is the output pin for the Timer/Counter1 Output CompareB function.
ALE is the Address Latch Enable used when the External Memory is enabled. The ALE
strobe is used to latch the low-order address (8 bits) into an address latch during the first
access cycle, and the AD0 - 7 pins are used for data during the second access cycle.
AT90S8515
5