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CM-080GE/CM-080GE-RA / CB-080GE/CB-080GE-RA
6.1.2. 12-bit Counter
A 25MHz clock or the camera pixel clock (33.75MHz) can be used as a source. The counter has
a "Divide by N", where N has the range 1 through 4096, allowing a wide range of clock
frequencies to be programmed. Setting Value 0 is bypass, setting value 1 is 1/2 dividing and
setting value 4095 is 1/4096 dividing.
6.1.3. Pulse Generators (0 to 3)
Each pulse generator consists of a 20bit counter. The behavior of these signals is defined by
their pulse width, start point and end point.
The pulse generator signals can be set in either triggered or periodic mode.
In triggered mode, the pulse is triggered by the rising edge/falling edge/high level or low
level of the input signal. In periodic mode, the trigger continuously generates a signal that is
based on the configured pulse width, starting point and end point.
Setting example:
The following example shows the FVAL input to pulse generator. The pulse generator creates
the pulse using FVAL and the pulse is output through GPIO PORT 1. The pixel clock is 60MHz.
Pulse Generator Setting Example
Pulse Generator 0
IN
(FVAL )
Clock IN
Clock Source=Pixel Clock ( 60MHz)
Clock Pre-scaler = 2399 ⇒ 25KHz
Start Point = 0
Pulse Generator 0
OUT
(GPIO Port 1 )
The created pulse rises up at the start point and falls down at the end point as shown above.
Accordingly, the High duration is (End point – Start point) clocks x (1/ Pulse gen. frequency).
In the above example, the original oscillation uses pixel clock (60 MHz) and the pixel clock is
divided by 2400. A pulse frequency of the generator is 25 KHz ( 60000000/2400). As the start
point is 0 and the end point is 99, the pulse having 100 x 1/25000 = 4ms width is created.
Start Point
Start Point
End Point
End Point
Length
Length
Fig.7. Generated pulse
Pulse Generator Clear = 4: Rising Edge
0
1
2
3
1/25KHz = 40µs
1
Length = 102
Fig 8. Pulse generator setting example
- 13 -
99 100 101 102 103
End Point = 99
2
Repeat counter: 0 to 255
=0: Continuously repeated
1
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