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A
B
8
FROM/TO MPEG/MICON/DSP
7
DAC_VIDEO_C
DAC_VIDEO_B
DAC_VIDEO_A
RESET
MC
MD
ML
AMCLK
ABCLK
ALRCLK
ASDATA0
SYS_MUTE
DUPTD1
6
DUPRD1
SPDIF
FROM/TO REGULATOR2
P.CON+5V_D
P.CON+3.3V_D
DVD_POWER_H
GND
5
D_GND
D_GND
TO MEMORY2
4
RESET
B8503
FCM2012H-102T04
3
FROM MOTOR DRV
2.4
2.5
4.9
0
8
7
6
DISC_IN_SW
9
10
11
0
2.4
3.3
2
1
A
B
G-7
C
AUDIO/VIDEO SCHEMATIC DIAGRAM
C8505
DAC_VIDEO_C
12P CH
L8502
1uH
0305
C8508
W819
DAC_VIDEO_B
12P CH
L8503
1uH
0305
C8511
W820
DAC_VIDEO_A
12P CH
L8504
1uH 0305
R8513
2.2
6
R8512
2.2
7
NC
0
1.6
1.1
1.6
5
4
3
2
1
12
13
14
15
16
0
0
0
3.3
1.7
NC
PLAYBACK LUMINANCE SIGNAL
R.SIGNAL+COMPONENT SIGNAL(U)
B.SIGNAL+COMPONENT SIGNAL(V)
DIGITAL AUDIO SIGNAL(PB)
AUDIO SIGNAL(PB)
C
D
E
(DVD PCB)
C8522
6.3V
470
YK
C8523
10
6.3V
470
YK
C8524
9
6.3V
470
YK
8
D8508
MCL4148
LEVEL CONVERT
Q8507
KTC3875S_Y_RTK
3.2
5.2
3.0
DVD_AUDIO_L
DVD_AUDIO_R
NOTE:THE DC VOLTAGE EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK.
D
E
F
G
DAC_C[U]C_VIDEO
DAC_B[V]Y_VIDEO
DAC_A[Y]_VIDEO
DUPTD1
DVD_POWER_H
RESET
DISC_IN_SW
DUPRD1
RX
D8509
ZERO
P.CON+3.3V_D
SPDIF
MCL4148
W817
DAC_B[V]Y_VIDEO
W826
DAC_C[U]C_VIDEO
W829
DAC_A[Y]_VIDEO
DVD_AUDIO_L
DVD_AUDIO_R
D8510
SYS_MUTE
MCL4148
NOTE:THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
F
G
H
8
7
6
5
4
FROM/TO IN/OUT
CD701
(CP701)
CU2G2202
DVD POWER
16
DVD_RESET
15
3
START_SW
14
TX
13
RX
12
ZERO
11
SPDIF-134
10
GND
9
[V]C_VIDEO
8
GND
7
[U]_VIDEO
6
GND
5
[Y]Y_VIDEO
4
GND
3
2
DVD_A_OUT_L
2
DVD_A_OUT_R
1
PCB130
VMD327
1
H
G-8
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