Mpeg/Micon/Dsp - Akai CFTD2052 Service Manual

Lcd color television/dvd video player
Table of Contents

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A
B
8
C4038
0.01 B
DUPTD1
DUPRD1
DUPTD0
DUPRD0
7
P.CON+5V_D
FROM/TO MEMORY2
6
208
3.3
HA0
SSCRXD
3.3
HA1
NC
MEMCS(1)
HA2
C4008 0.1 F
3.3
VDDP
HA3
HA15
3.0
MEMAD(15)
HA4
3.0
HA16
HA5
MEMAD(16)
HA14
3.0
HA6
MEMAD(14)
HA7
HA13
3.3
MEMAD(13)
HA8
3.3
HA12
MEMAD(12)
HA9
HD15
0
HA10
MEMDA(15)
HA11
0.5
HA11
MEMAD(11)
HA12
2.6
HD7
MEMDA(7)
HA13
0
GNDP
HA14
HA10
0
HA15
MEMAD(10)
1.9
HD14
HA16
5
MEMDA(14)
0
HA17
HA9
MEMAD(9)
HA18
HD6
0
MEMDA(6)
HA19
0
HA8
HA20
MEMAD(8)
2.1
HD13
HD0
MEMDA(13)
HD1
HD5
2.0
MEMDA(5)
HD2
0
HA20
MEMAD(20)
HD3
3.3
C4010 0.1 F
HD4
VDDP
HD12
0.6
HD5
MEMDA(12)
3.3
HD6
WR
MEMWR#
HD7
HD4
2.6
MEMDA(4)
HD8
C4013 0.1 F
1.8
HD9
VDDC
2.7
HD11
HD10
MEMDA(11)
HD11
HD3
2.9
MEMDA(3)
HD12
HA19
0
MEMAD(19)
HD13
0
4
HD14
GNDC
HD10
0.5
HD15
MEMDA(10)
MEMCS0
HA18
0
MEMAD(18)
RD
0
GNDP
WR
HD2
0.6
MEMDA(2)
HA17
0
MEMAD(17)
0.6
HD9
MEMDA(9)
HA7
2.7
SD_A0
MEMAD(7)
HD1
2.7
SD_A1
MEMDA(1)
0.6
SD_A2
HA6
MEMAD(6)
SD_A3
HD8
0.4
MEMDA(8)
SD_A4
5.5
HA5
SD_A5
MEMAD(5)
3.3
C4014 0.1 F
SD_A6
VDDP
SD_A7
HD0
0.4
MEMDA(0)
SD_A8
3.3
HA4
MEMAD(4)
SD_A9
0
RD
3
SD_A10
MEMRD#
HA3
0
SD_A11
MEMAD(3)
SD_D0
0
HA2
MEMAD(2)
SD_D1
3.1
MEMCS0
MEMCS(0)#
SD_D2
HA1
3.1
SD_D3
MEMAD(1)
3.2
HA0
SD_D4
MEMAD(0)
0
SD_D5
GNDP
SD_D6
C4016 0.1 F
3.3
VDD-IP
SD_D7
C4017 0.1 F
3.3
SD_D8
VDDP
SD_D9
53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
SD_D10
SD_D11
SD_D12
SD_D13
SD_D14
SD_D15
RAMCS0#
2
RAMCS1#
RAMRAS#
RAMCAS#
SD_BA0
RAMDQM
RAMWE#
RAMCLK
R4053
R4054
NC
NC
1K
1K
BOOTSEL2
BOOTSEL1
1
A
B
G-1
C
MPEG/MICON/DSP SCHEMATIC DIAGRAM
C4088
0.01 B
C4089
0.01 B
C4090
0.01 B
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
208
SSCTXD
207
SSCCLK
206
SPINDLEPULSE
205
SLEDPULSE
MPEG/MICON/DSP IC
IC4001
ZR36762PQCG_V
53
RAMADD(4)
54
RAMADD(3)
55
RAMADD(5)
56
RAMADD(2)
NOTE:THE DC VOLTAGE EACH PART WAS
MEASURED WITH THE DIGITAL TESTER
DURING PLAYBACK.
C
D
E
(DVD PCB)
R4002
75 +-1%
R4003
75 +-1%
R4004
75 +-1%
R4005
75 +-1%
AFE_GND
GND
V_GND
+1.8V
+3.3V
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
3.3
DUPTD1
5.1
DUPRD1
3.3
C4033 0.1 F
VDD-IP
3.3
DUPTD0
5.0
DUPRD0
0
GNDP
3.3
IDGPCI/O(3)
0
C4032 0.001 B
TRAY_OPEN
160
VDDDAC
GPCI/O(34)
3.3
TP4012
ICGPCI/O(5)
159
CVBS/C
0
TRAY_CLOSE
C4096 0.001 B
GPCI/O(33)
0
TP4013
158
CVBS/G/Y
ICGPCI/O(4)
3.1
GPCI/O(32)
157
GNDDACD
3.3
C4027 0.1 F
VDDP
0
C4034
GCLKA
0
R4042
X4001
1
GCLKP
100
100BT02701
0
XO
27MHZ
1.8
VDDA
C4028 0.1 F
C4035 16P CH
3.3
RESET#
0
GNDA
5.0
HOME
IDGPCI/O(2)
3.3
TP4014
GPCI/O(31)
3.3
VID(0)
3.3
DJTDO
R4019
33
VID(1)
0
DJTDI
R4020
33
VID(2)
0
DJTMS
R4021
33
VID(3)
0
ICETCK
V SW
3.3
ICETDO
TP4007
D1 2
3.3
ICETDI
D1 1
3.3
A_MUTE
VID(7)
3.3
TP4010
VDDP
3.3
STBY-L
0
GNDP
3.3
HSYNC
1.6
C4030 0.1 F
VDDC
3.3
VSYNC
0
GNDC
3.3
R4024
AIN
3.3
4.7K
C4031 0.01 B
VDDP-A2
1.7
AMCLK
100
RAMDAT(14)
0
GNDP-A2
1.7
101
GNDP
ABCLK
1.6
ALRCLK
102
RAMDAT(1)
0
GPAI/O
NC
NC
0
103
RAMDAT(15)
TP4015
AOUT(0)
0
ASDATA1
104
RAMDAT(0)
AOUT(1)
0
ASDATA2
2
AOUT(2)
1.6
TP4016
SPDIF
0
FCM2012H-102T04
IDGPCI/O(0)
0
ICGPCI/O(0)
0
GNDP
0
R4014
GPCI/O(20)
3.3
C4026 0.1 F
VDDP
100
101102103104
FCM2012H-102T04
NOTE:THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME
OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE
D
E
F
G
B4002
FCM2012H-102T04
B4003
B4001
FCM2012H-102T04
FCM2012H-102T04
B4004
FCM2012H-102T04
B4005
FCM2012H-102T04
DUPTD1
DUPRD1
DUPTD0
DUPRD0
VR_SEL
TOUT_SW
DISC_END_SW
PSMUTE
5P CH
B4009
RESET
R4043
FCM2012H-102T04
C4081
HOME
10K
LDON
0.1 F
ML
TP4004
MC
TP4006
MD
TP4005
TP4008
SYS_MUTE
TP4009
R4031
4.7K
I2CCLK
C4029
0.1 F
I2CDAT
R4035
4.7K
I2CDAT
3.2
3.2
0
3.3
5
6
7
8
I2CCLK
SDA
SCL
WP
VCC
IAMCLK
R4025
270
AMCLK
GND
NC
NC
NC
IABCLK
R4026
220
ABCLK
4
3
2
1
IALRCLK
R4027
220
ALRCLK
0
0
0
0
R4058
220
ASDATA0
R4022
270
B4010
SPDIF
4.7K
GAIN_SW
SBMUTE
B4006
TP4003
DIGITAL AUDIO SIGNAL(PB)
F
G
H
8
FROM/TO AUDIO/VIDEO
DAC_VIDEO_C
DAC_VIDEO_B
DAC_VIDEO_A
ASDATA0
ABCLK
ALRCLK
AMCLK
MD
MC
ML
RESET
SYS_MUTE
SPDIF
DUPRD1
7
DUPTD1
FROM/TO RF AMP
GAIN_SW
RFA_SDEN
RFA_DATA
RFA_SCLK
AAF_CE
AAF_FE
AAF_TE
AAF_PI
6
VR_SEL
FNN
FNP
VBIASS0
VBIASS1
DEFECT
LINK
MIRR
LDON
FROM/TO MOTOR DRIVE
SLED_PWM2
5
LDM
TRACK_DAC
FOCUS_DAC
SPINDLE_PWM
SLED_PWM
SPD_FG
D4002 MCL4148
TOUT_SW
DISC_IN_SW
HOME
SBMUTE
PSMUTE
DISC_END_SW
4
FROM REGULATOR2
P.CON+3.3V_D
P.CON+5V_D
GND
D_GND
P.CON+1.8V_D
3
2
PCB130
VMD327
1
H
G-2

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