National Instruments DAQ PCI-4451 User Manual page 7

Contents
Figures
Figure 3-1.
Figure 3-2.
Figure 3-3.
Figure 3-4.
Figure 3-5.
Figure 3-6.
Figure 3-7.
Figure 3-8.
Figure 4-1.
Figure 4-2.
Figure 4-3.
Figure 4-4.
Figure 4-5.
Figure 4-6.
Figure 4-7.
Figure 4-8.
Figure 4-9.
Figure 4-10.
Figure 4-11.
Figure 4-12.
Figure 4-13.
Figure 6-1.
Figure 6-2.
Figure 6-3.
Figure 6-4.
Figure 6-5.
Figure A-1.
Figure B-1.
Tables
Table 3-1.
Table 3-2.
Table 4-1.
Table 4-2.
Table 4-3.
Table 4-4.
PCI-4451/4452 User Manual
Digital Function Block Diagram........................................................... 3-1
Analog Function Block Diagram .......................................................... 3-2
Below-Low-Level Triggering Mode..................................................... 3-7
Above-High-Level Triggering Mode.................................................... 3-8
Inside-Region Triggering Mode ........................................................... 3-8
High-Hysteresis Triggering Mode ........................................................ 3-8
Low-Hysteresis Triggering Mode......................................................... 3-9
RTSI Bus Signal Connection ................................................................ 3-10
Analog Pin Connections ....................................................................... 4-2
Digital Pin Connections ........................................................................ 4-5
Analog Input Stage ............................................................................... 4-9
Analog Output Channel Block Diagram............................................... 4-11
Digital I/O Connections ........................................................................ 4-13
Typical Posttriggered Acquisition ........................................................ 4-15
Typical Pretriggered AcquisitionPFI1 .................................................. 4-16
EXTSTROBE* Signal Timing ............................................................. 4-18
GPCTR0_SOURCE Signal Timing ...................................................... 4-19
GPCTR0_OUT Signal Timing ............................................................. 4-20
GPCTR1_SOURCE Signal Timing ...................................................... 4-21
GPCTR1_OUT Signal Timing ............................................................. 4-22
GPCTR Timing Summary .................................................................... 4-23
Input Frequency Response .................................................................... 6-5
Input Frequency Response Near the Cutoff.......................................... 6-6
Alias Rejection at the Oversample Rate ............................................... 6-7
Comparison of a Clipped Signal to a Proper Signal ............................. 6-8
Signal Spectra in the DAC .................................................................... 6-11
Idle Channel Noise (Typical)................................................................ A-4
68-Pin Digital Connector for any Digital Accessory ............................ B-2
Actual Range and Measurement Precision ........................................... 3-4
Actual Range and Measurement Precision ........................................... 3-6
Analog I/O Connector Pin Assignment ................................................ 4-3
Analog I/O Signal Summary................................................................. 4-4
Digital I/O Connector Pin Assignment ................................................. 4-6
Digital I/O Signal Summary ................................................................. 4-8
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