Advanced Chipset Setup - Aaeon SBC-670S Manual

Select the Advanced Chipset Setup from the AMIBIOS Setup
main menu to enter the Chipset Setup. The following configura-
tions are based on Fail-Safe default settings.
This section allows you to configure the system based on the
specific features of the installed chipset. This chipset manages bus
speeds and access to system memory resources, such as DRAM
and the external cache. It also coordinates communications
between the conventional ISA bus and the PCI bus. It must be
stated that these items should never need to be altered. The default
settings have been chosen because they provide the best operating
conditions for your system.
AMIBIOS SETUP — ADVANCED CHIPSET SETUP
(C) 1995 American Megatrends, Inc. All Rights Reserved
Auto Configure DRAM Timing
DRAM Speed (ns)
DRAM Read Burst Timing (B/E/F)
DRAM Write Burst Timing (B/E/F)
RAS Precharge
RASx# to CASx# Delay
MA Wait State
DRAM Integrity Mode (ECC)
DRAM Refresh Type
DRAM Refresh Queue
VGA Frame Buffer USWC
PCI Frame Buffer USWC
Fixed Memory Hole
CPU To IDE Posting
USWC Write Posting
CPU To PCI Posting
PCI To DRAM Pipeline
PCI Burst Write Combine
Read Around Write
8-Bit I/O Recovery Times
16-Bit I/O Recovery Times
Universal Serial Bus
USB Keyboard Support
Set this option Enabled to enable the system BIOS USB (Univer-
sal Serial Bus) functions. The settings are Enabled or Disabled.
Set this option to Enabled to enable keyboard support on the
universal serial bus. The settings are Enabled or Disabled.
Enabled
60
x2/2/3
x2/2/3
3 Clocks
Disabled
Disabled
Disabled
CAS/RAS
Enabled
Disabled
Disabled
Disabled
Enabled
Enabled
Disabled
Enabled
Enabled
Enabled
1 SysClk
1 SysClk ESC: Exit
Disabled PgUp/PgDn: Modify
Disabled F2/F3: Color
:Sel
¯-