Casio QT-6000 Service Manual page 61

NO. PIN NAME
110 WE3/ICIOWR
111 VDD
112 VSS
113 SLEEP
114 PCIGNT4
115 PCIGNT3
116 PCIGNT2
117 PCIREQ4
118 PCIREQ3/MD10
119 VDDQ
120 VSSQ
121 PCIREQ2/MD9
122 IDSEL
123 INTA
124 PCIRST
125 PCICLK
126 PCIGNT1/REQOUT
127 PCIREQ1/GNTIN
128 SERR
129 AD31
130 AD30
131 VDDQ
132 VSSQ
133 AD29
134 AD28
135 AD27
136 AD26
137 AD25
138 AD24
139 C/BE3
140 AD23
141 AD22
142 AD21
143 VDDQ
144 VSSQ
145 VDD
146 VSS
147 AD20
148 AD19
149 AD18
150 AD17
151 AD16
152 C/BE2
153 PCIFRAME
154 IRDY
155 TRDY
156 DEVSEL
157 VDDQ
158 VSSQ
159 PCISTOP
160 PCILOCK
161 PERR
162 PAR
163 C/BE1
164 AD15
I/O
O D31–D24 select signal
Power Internal VDD
Power Internal GND
I Sleep
O Bus grant (host function)
O Bus grant (host function)
O Bus grant (host function)
I* Bus request (host function)
I* Bus request (host function)/mode
Power IO VDD
Power IO GND
I* Bus request (host function)/mode
I Configuration device select
O Interrupt (async)
O Reset output
I PCI input clock
O Bus grant (host function)/bus request
I Bus request (host function)/bus grant
I/O System error
I/O PCI address/data/port
I/O PCI address/data/port
Power IO VDD
Power IO GND
I/O PCI address/data/port
I/O Command/byte enable
I/O PCI address/data/port
Power IO VDD
Power IO GND
Power Internal VDD
Power Internal GND
I/O PCI address/data/port
I/O Command/byte enable
I/O Bus cycle
I/O Initiator ready
I/O Target read
I/O Device select
Power IO VDD
Power IO GND
I/O Transaction stop
I/O Exclusive access
I/O Parity error
I/O Parity
I/O Command/byte enable
I/O PCI address/data/port
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DESCRIPTION