Real Time Devices AD1200 User Manual page 92

intef
82C54
Block Dlagram
DATA BUS BUFFER
This 3-state, bi-directional, 8-bit butler is used to in-
terface the 82C54 to the system bus (see Figure 3).
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CONTROL WORD REGISTER
The ControlWord Register (see Figure 4) is selected
by the Read/Write Logic when Ar, Ao : 11. lf the
CPU then does a write operation to the 82C54, the
data is stored in the Control Word Register and is
interpreted as a Control Word used to define the
operation of the Counters.
The Control Word Register can only be written to;
status information is available with the Read-Back
Command.
Flgure 4. Block Dlagram Showlng Control Word
Reglster and Gounter Functlons
couNTER O, COUNTEB 1, COUNTER 2
These three functional blocks are identical in opera-
tion, so only a single Counter will be described. The
internal block diagram of a single counter is shown
in Figure 5.
The Counters are fully independent. Each Counter
may operate in a different Mode.
The Control Word Register is shown in the figure; it
is not part of the Counter itself, but its contents de-
termine how the Counter operates.
Flgure 3. Block Dlagram Showlng Data Bus
Buffer and Read/Wrlte Loglc Functlons
READ/WRITE LOGIC
The Read/Write Logic accepts inputs from the sys-
tem bus and generates control signals for the other
functional blocks of the 82C54. A1 and As select
one of the three counters or the Control Word ReE
ter to be read from/written into. A "low" on the FiD
input tells the 82C54 that the CPl.l is reading one of
the counters. A "low" on the WH input tells the
82C54 that the CPU is writinq either a Control Word
or an initial count. Both FiD anO Wn- are qualified by
6; HE and WH are ignored unless the 82C54 hai
been selected by holding CS low.
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