Real Time Devices AD1200 User Manual page 122

82C55A
Comblnatlone of IIODE I
Port A and Port B cbn be individually defined as input or output in Mode 1 to support a wide variety of strobed
l/O applications.
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Flgure 12. Comblnatlons of ilODE 1
Operatlng Modes
MODE 2 (Strobed Bidlrectlonal Bus l/O).This
functional configuration provides a means for com-
municating with a peripheral device or structure on a
single 8-bit bus for both transmitting and receiving
data (bidirectional bus l/O). "Handshaking" signals
are provided to maintain proper bus flow discipline in
a similar manner to MODE 1. Intenupt generation
and enable/disable functions are also available.
MODE 2 Basic Functional Definitions:
. Used in Group A only.
o One 8-bit, bi-directional bus port (Port A) and a 5-
bit control port (Port G).
o Both inputs and outputs are latched.
o The S-bit control port (Port C) is used foi control
and status for the 8-bit, bi-directional bus port
(Port A).
Bldirectional Bus l/O Control Signal Definltlon
INTR (lnterrupt Request). A high on this output can
be used to interrupt the CPU for input or output oper-
ations.
Output Operatlons
OEF (Output Buffer Full). The 6EF output witt 9o
"lovv" to indicate that the CPU has written data out
to port A.
ffi
(ncmowbdge). A "low" on this input enables
the tri-state output butfer of Port A to send out the
data. Otherwise, the output bufler will be in the high
impedance state.
INTE I (The INTE Fllp-Flop Assoclated wlth
OBF). Controlled by bit set/reset of PC6.
Input Operatlons
SF lStroUe Input). A "low" on this input loads
data into the input latch.
IBF (lnput Buffer Full F/F). A "high" on this output
indicates that data has been loaded into the input
latch.
INTE 2 (The INTE Flip-Flop Assoclated wtth tBF).
Gontrolled by bit set/reset of PCa.
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